mux_dpll_vpll0_vpll1_usb480m_xin24m_p  128 drivers/clk/rockchip/clk-rk3308.c PNAME(mux_dpll_vpll0_vpll1_usb480m_xin24m_p)	= { "dpll", "vpll0", "vpll1", "usb480m", "xin24m" };
mux_dpll_vpll0_vpll1_usb480m_xin24m_p  330 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(0, "clk_uart0_src", mux_dpll_vpll0_vpll1_usb480m_xin24m_p, 0,
mux_dpll_vpll0_vpll1_usb480m_xin24m_p  340 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(0, "clk_uart1_src", mux_dpll_vpll0_vpll1_usb480m_xin24m_p, 0,
mux_dpll_vpll0_vpll1_usb480m_xin24m_p  350 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(0, "clk_uart2_src", mux_dpll_vpll0_vpll1_usb480m_xin24m_p, 0,
mux_dpll_vpll0_vpll1_usb480m_xin24m_p  360 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(0, "clk_uart3_src", mux_dpll_vpll0_vpll1_usb480m_xin24m_p, 0,
mux_dpll_vpll0_vpll1_usb480m_xin24m_p  370 drivers/clk/rockchip/clk-rk3308.c 	COMPOSITE(0, "clk_uart4_src", mux_dpll_vpll0_vpll1_usb480m_xin24m_p, 0,