mux_dclk_vopl_p   169 drivers/clk/rockchip/clk-px30.c PNAME(mux_dclk_vopl_p)		= { "dclk_vopl_src", "dclk_vopl_frac", "xin24m" };
mux_dclk_vopl_p   248 drivers/clk/rockchip/clk-px30.c 	MUX(0, "dclk_vopl_mux", mux_dclk_vopl_p, CLK_SET_RATE_PARENT,