mux_2plls_u480m_p  153 drivers/clk/rockchip/clk-rk3328.c PNAME(mux_2plls_u480m_p)	= { "cpll", "gpll",
mux_2plls_u480m_p  414 drivers/clk/rockchip/clk-rk3328.c 	COMPOSITE(0, "clk_uart0_div", mux_2plls_u480m_p, 0,
mux_2plls_u480m_p  417 drivers/clk/rockchip/clk-rk3328.c 	COMPOSITE(0, "clk_uart1_div", mux_2plls_u480m_p, 0,
mux_2plls_u480m_p  420 drivers/clk/rockchip/clk-rk3328.c 	COMPOSITE(0, "clk_uart2_div", mux_2plls_u480m_p, 0,
mux_2plls_u480m_p  490 drivers/clk/rockchip/clk-rk3328.c 	COMPOSITE(SCLK_WIFI, "clk_wifi", mux_2plls_u480m_p, 0,