mux_2plls_24m_u480m_p  155 drivers/clk/rockchip/clk-rk3328.c PNAME(mux_2plls_24m_u480m_p)	= { "cpll", "gpll",
mux_2plls_24m_u480m_p  622 drivers/clk/rockchip/clk-rk3328.c 	COMPOSITE(SCLK_SDMMC, "clk_sdmmc", mux_2plls_24m_u480m_p, 0,
mux_2plls_24m_u480m_p  626 drivers/clk/rockchip/clk-rk3328.c 	COMPOSITE(SCLK_SDIO, "clk_sdio", mux_2plls_24m_u480m_p, 0,
mux_2plls_24m_u480m_p  630 drivers/clk/rockchip/clk-rk3328.c 	COMPOSITE(SCLK_EMMC, "clk_emmc", mux_2plls_24m_u480m_p, 0,
mux_2plls_24m_u480m_p  634 drivers/clk/rockchip/clk-rk3328.c 	COMPOSITE(SCLK_SDMMC_EXT, "clk_sdmmc_ext", mux_2plls_24m_u480m_p, 0,