mtc0_inst         127 arch/mips/kvm/dyntrans.c 	union mips_instruction mtc0_inst = { 0 };
mtc0_inst         133 arch/mips/kvm/dyntrans.c 	mtc0_inst.i_format.opcode = sw_op;
mtc0_inst         134 arch/mips/kvm/dyntrans.c 	mtc0_inst.i_format.rt = inst.c0r_format.rt;
mtc0_inst         135 arch/mips/kvm/dyntrans.c 	mtc0_inst.i_format.simmediate = KVM_GUEST_COMMPAGE_ADDR |
mtc0_inst         139 arch/mips/kvm/dyntrans.c 		mtc0_inst.i_format.simmediate |= 4;
mtc0_inst         142 arch/mips/kvm/dyntrans.c 	return kvm_mips_trans_replace(vcpu, opc, mtc0_inst);