mstr_cfg          270 drivers/spi/spi-qcom-qspi.c 	u32 mstr_cfg;
mstr_cfg          279 drivers/spi/spi-qcom-qspi.c 	mstr_cfg = readl(ctrl->base + MSTR_CONFIG);
mstr_cfg          280 drivers/spi/spi-qcom-qspi.c 	mstr_cfg &= ~CHIP_SELECT_NUM;
mstr_cfg          282 drivers/spi/spi-qcom-qspi.c 		mstr_cfg |= CHIP_SELECT_NUM;
mstr_cfg          284 drivers/spi/spi-qcom-qspi.c 	mstr_cfg |= FB_CLK_EN | PIN_WPN | PIN_HOLDN | SBL_EN | FULL_CYCLE_MODE;
mstr_cfg          285 drivers/spi/spi-qcom-qspi.c 	mstr_cfg &= ~(SPI_MODE_MSK | TX_DATA_OE_DELAY_MSK | TX_DATA_DELAY_MSK);
mstr_cfg          286 drivers/spi/spi-qcom-qspi.c 	mstr_cfg |= message->spi->mode << SPI_MODE_SHFT;
mstr_cfg          287 drivers/spi/spi-qcom-qspi.c 	mstr_cfg |= tx_data_oe_delay << TX_DATA_OE_DELAY_SHFT;
mstr_cfg          288 drivers/spi/spi-qcom-qspi.c 	mstr_cfg |= tx_data_delay << TX_DATA_DELAY_SHFT;
mstr_cfg          289 drivers/spi/spi-qcom-qspi.c 	mstr_cfg &= ~DMA_ENABLE;
mstr_cfg          291 drivers/spi/spi-qcom-qspi.c 	writel(mstr_cfg, ctrl->base + MSTR_CONFIG);