msto 663 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_msto *msto[4]; msto 688 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_msto_payload(struct nv50_msto *msto) msto 690 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev); msto 691 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_mstc *mstc = msto->mstc; msto 697 drivers/gpu/drm/nouveau/dispnv50/disp.c NV_ATOMIC(drm, "%s: vcpi %d\n", msto->encoder.name, vcpi); msto 715 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_msto_cleanup(struct nv50_msto *msto) msto 717 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev); msto 718 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_mstc *mstc = msto->mstc; msto 721 drivers/gpu/drm/nouveau/dispnv50/disp.c if (!msto->disabled) msto 724 drivers/gpu/drm/nouveau/dispnv50/disp.c NV_ATOMIC(drm, "%s: msto cleanup\n", msto->encoder.name); msto 728 drivers/gpu/drm/nouveau/dispnv50/disp.c msto->mstc = NULL; msto 729 drivers/gpu/drm/nouveau/dispnv50/disp.c msto->head = NULL; msto 730 drivers/gpu/drm/nouveau/dispnv50/disp.c msto->disabled = false; msto 734 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_msto_prepare(struct nv50_msto *msto) msto 736 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev); msto 737 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_mstc *mstc = msto->mstc; msto 747 drivers/gpu/drm/nouveau/dispnv50/disp.c (0x0100 << msto->head->base.index), msto 752 drivers/gpu/drm/nouveau/dispnv50/disp.c NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name); msto 754 drivers/gpu/drm/nouveau/dispnv50/disp.c struct drm_dp_payload *payload = nv50_msto_payload(msto); msto 764 drivers/gpu/drm/nouveau/dispnv50/disp.c msto->encoder.name, msto->head->base.base.name, msto 838 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_msto *msto = nv50_msto(encoder); msto 848 drivers/gpu/drm/nouveau/dispnv50/disp.c if (connector->state->best_encoder == &msto->encoder) { msto 875 drivers/gpu/drm/nouveau/dispnv50/disp.c msto->head = head; msto 876 drivers/gpu/drm/nouveau/dispnv50/disp.c msto->mstc = mstc; msto 883 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_msto *msto = nv50_msto(encoder); msto 884 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_mstc *mstc = msto->mstc; msto 889 drivers/gpu/drm/nouveau/dispnv50/disp.c mstm->outp->update(mstm->outp, msto->head->base.index, NULL, 0, 0); msto 893 drivers/gpu/drm/nouveau/dispnv50/disp.c msto->disabled = true; msto 906 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_msto *msto = nv50_msto(encoder); msto 907 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_encoder_cleanup(&msto->encoder); msto 908 drivers/gpu/drm/nouveau/dispnv50/disp.c kfree(msto); msto 920 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_msto *msto; msto 923 drivers/gpu/drm/nouveau/dispnv50/disp.c if (!(msto = *pmsto = kzalloc(sizeof(*msto), GFP_KERNEL))) msto 926 drivers/gpu/drm/nouveau/dispnv50/disp.c ret = drm_encoder_init(dev, &msto->encoder, &nv50_msto, msto 934 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_encoder_helper_add(&msto->encoder, &nv50_msto_help); msto 935 drivers/gpu/drm/nouveau/dispnv50/disp.c msto->encoder.possible_crtcs = heads; msto 946 drivers/gpu/drm/nouveau/dispnv50/disp.c return &mstc->mstm->msto[head->base.index]->encoder; msto 954 drivers/gpu/drm/nouveau/dispnv50/disp.c return &mstc->mstm->msto[0]->encoder; msto 1095 drivers/gpu/drm/nouveau/dispnv50/disp.c for (i = 0; i < ARRAY_SIZE(mstm->msto) && mstm->msto[i]; i++) msto 1096 drivers/gpu/drm/nouveau/dispnv50/disp.c drm_connector_attach_encoder(&mstc->connector, &mstm->msto[i]->encoder); msto 1119 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_msto *msto = nv50_msto(encoder); msto 1120 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_mstc *mstc = msto->mstc; msto 1122 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_msto_cleanup(msto); msto 1141 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_msto *msto = nv50_msto(encoder); msto 1142 drivers/gpu/drm/nouveau/dispnv50/disp.c struct nv50_mstc *mstc = msto->mstc; msto 1144 drivers/gpu/drm/nouveau/dispnv50/disp.c nv50_msto_prepare(msto); msto 1395 drivers/gpu/drm/nouveau/dispnv50/disp.c i, &mstm->msto[i]);