mst_enc 621 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv; mst_enc 622 drivers/gpu/drm/radeon/atombios_crtc.c struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv; mst_enc 29 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_encoder_mst *mst_enc, mst_enc 45 drivers/gpu/drm/radeon/radeon_dp_mst.c reg |= NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe); mst_enc 47 drivers/gpu/drm/radeon/radeon_dp_mst.c reg &= ~NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe); mst_enc 54 drivers/gpu/drm/radeon/radeon_dp_mst.c uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe); mst_enc 60 drivers/gpu/drm/radeon/radeon_dp_mst.c DRM_ERROR("timed out waiting for FE %d %d\n", primary->offset, mst_enc->fe); mst_enc 126 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_encoder_mst *mst_enc; mst_enc 136 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc = subenc->enc_priv; mst_enc 138 drivers/gpu/drm/radeon/radeon_dp_mst.c if (!mst_enc->enc_active) mst_enc 141 drivers/gpu/drm/radeon/radeon_dp_mst.c new_attribs[idx].fe = mst_enc->fe; mst_enc 142 drivers/gpu/drm/radeon/radeon_dp_mst.c new_attribs[idx].slots = drm_dp_mst_get_vcpi_slots(&mst_conn->mst_mgr, mst_enc->port); mst_enc 168 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_encoder_mst *mst_enc = mst->enc_priv; mst_enc 170 drivers/gpu/drm/radeon/radeon_dp_mst.c uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe); mst_enc 185 drivers/gpu/drm/radeon/radeon_dp_mst.c DRM_ERROR("timed out wait for rate cntl %d\n", mst_enc->fe); mst_enc 357 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv; mst_enc 360 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv; mst_enc 384 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_encoder_mst *mst_enc; mst_enc 402 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc = radeon_encoder->enc_priv; mst_enc 404 drivers/gpu/drm/radeon/radeon_dp_mst.c primary = mst_enc->primary; mst_enc 418 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->fe = dig_enc->dig_encoder; mst_enc 419 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->fe_from_be = true; mst_enc 420 drivers/gpu/drm/radeon/radeon_dp_mst.c atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe); mst_enc 426 drivers/gpu/drm/radeon/radeon_dp_mst.c if (radeon_dp_needs_link_train(mst_enc->connector) || mst_enc 428 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_dp_link_train(&primary->base, &mst_enc->connector->base); mst_enc 432 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->fe = radeon_atom_pick_dig_encoder(encoder, radeon_crtc->crtc_id); mst_enc 433 drivers/gpu/drm/radeon/radeon_dp_mst.c if (mst_enc->fe == -1) mst_enc 435 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->fe_from_be = false; mst_enc 436 drivers/gpu/drm/radeon/radeon_dp_mst.c atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe); mst_enc 443 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->pbn); mst_enc 446 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->pbn, slots); mst_enc 449 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_dp_mst_set_be_cntl(primary, mst_enc, mst_enc 452 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->enc_active = true; mst_enc 455 drivers/gpu/drm/radeon/radeon_dp_mst.c fixed_pbn = drm_int2fixp(mst_enc->pbn); mst_enc 461 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->fe); mst_enc 472 drivers/gpu/drm/radeon/radeon_dp_mst.c if (!mst_enc->enc_active) mst_enc 475 drivers/gpu/drm/radeon/radeon_dp_mst.c drm_dp_mst_reset_vcpi_slots(&radeon_connector->mst_port->mst_mgr, mst_enc->port); mst_enc 482 drivers/gpu/drm/radeon/radeon_dp_mst.c drm_dp_mst_deallocate_vcpi(&radeon_connector->mst_port->mst_mgr, mst_enc->port); mst_enc 484 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->enc_active = false; mst_enc 487 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_dp_mst_set_be_cntl(primary, mst_enc, mst_enc 490 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->fe); mst_enc 492 drivers/gpu/drm/radeon/radeon_dp_mst.c if (!mst_enc->fe_from_be) mst_enc 493 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_atom_release_dig_encoder(rdev, mst_enc->fe); mst_enc 495 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->fe_from_be = false; mst_enc 510 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_encoder_mst *mst_enc; mst_enc 515 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc = radeon_encoder->enc_priv; mst_enc 517 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); mst_enc 519 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices; mst_enc 521 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->primary->active_device, mst_enc->primary->devices, mst_enc 522 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->connector->devices, mst_enc->primary->base.encoder_type); mst_enc 526 drivers/gpu/drm/radeon/radeon_dp_mst.c dig_connector = mst_enc->connector->con_priv; mst_enc 538 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_encoder_mst *mst_enc; mst_enc 550 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc = radeon_encoder->enc_priv; mst_enc 552 drivers/gpu/drm/radeon/radeon_dp_mst.c primary = mst_enc->primary; mst_enc 556 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->port = radeon_connector->port; mst_enc 606 drivers/gpu/drm/radeon/radeon_dp_mst.c struct radeon_encoder_mst *mst_enc; mst_enc 616 drivers/gpu/drm/radeon/radeon_dp_mst.c radeon_encoder->enc_priv = kzalloc(sizeof(*mst_enc), GFP_KERNEL); mst_enc 642 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc = radeon_encoder->enc_priv; mst_enc 643 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->connector = connector; mst_enc 644 drivers/gpu/drm/radeon/radeon_dp_mst.c mst_enc->primary = to_radeon_encoder(enc_master); mst_enc 253 drivers/gpu/drm/radeon/radeon_encoders.c struct radeon_encoder_mst *mst_enc; mst_enc 258 drivers/gpu/drm/radeon/radeon_encoders.c mst_enc = radeon_encoder->enc_priv; mst_enc 259 drivers/gpu/drm/radeon/radeon_encoders.c if (mst_enc->connector == radeon_connector->mst_port)