msrs 27 arch/x86/include/asm/msr.h struct msr *msrs; msrs 334 arch/x86/include/asm/msr.h void msrs_free(struct msr *msrs); msrs 343 arch/x86/include/asm/msr.h void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs); msrs 344 arch/x86/include/asm/msr.h void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs); msrs 373 arch/x86/include/asm/msr.h struct msr *msrs) msrs 375 arch/x86/include/asm/msr.h rdmsr_on_cpu(0, msr_no, &(msrs[0].l), &(msrs[0].h)); msrs 378 arch/x86/include/asm/msr.h struct msr *msrs) msrs 380 arch/x86/include/asm/msr.h wrmsr_on_cpu(0, msr_no, msrs[0].l, msrs[0].h); msrs 591 arch/x86/kernel/cpu/mce/amd.c u32 msrs[NR_BLOCKS]; msrs 594 arch/x86/kernel/cpu/mce/amd.c msrs[0] = 0x00000413; /* MC4_MISC0 */ msrs 595 arch/x86/kernel/cpu/mce/amd.c msrs[1] = 0xc0000408; /* MC4_MISC1 */ msrs 603 arch/x86/kernel/cpu/mce/amd.c msrs[0] = MSR_AMD64_SMCA_MCx_MISC(bank); msrs 618 arch/x86/kernel/cpu/mce/amd.c msr_clear_bit(msrs[i], 62); msrs 364 arch/x86/kvm/vmx/evmcs.c vmx->nested.msrs.pinbased_ctls_high &= ~EVMCS1_UNSUPPORTED_PINCTRL; msrs 365 arch/x86/kvm/vmx/evmcs.c vmx->nested.msrs.entry_ctls_high &= ~EVMCS1_UNSUPPORTED_VMENTRY_CTRL; msrs 366 arch/x86/kvm/vmx/evmcs.c vmx->nested.msrs.exit_ctls_high &= ~EVMCS1_UNSUPPORTED_VMEXIT_CTRL; msrs 367 arch/x86/kvm/vmx/evmcs.c vmx->nested.msrs.secondary_ctls_high &= ~EVMCS1_UNSUPPORTED_2NDEXEC; msrs 368 arch/x86/kvm/vmx/evmcs.c vmx->nested.msrs.vmfunc_controls &= ~EVMCS1_UNSUPPORTED_VMFUNC; msrs 352 arch/x86/kvm/vmx/nested.c to_vmx(vcpu)->nested.msrs.ept_caps & msrs 882 arch/x86/kvm/vmx/nested.c u64 vmx_misc = vmx_control_msr(vmx->nested.msrs.misc_low, msrs 883 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.misc_high); msrs 1063 arch/x86/kvm/vmx/nested.c u64 vmx_basic = vmx->nested.msrs.basic; msrs 1082 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.basic = data; msrs 1094 arch/x86/kvm/vmx/nested.c lowp = &vmx->nested.msrs.pinbased_ctls_low; msrs 1095 arch/x86/kvm/vmx/nested.c highp = &vmx->nested.msrs.pinbased_ctls_high; msrs 1098 arch/x86/kvm/vmx/nested.c lowp = &vmx->nested.msrs.procbased_ctls_low; msrs 1099 arch/x86/kvm/vmx/nested.c highp = &vmx->nested.msrs.procbased_ctls_high; msrs 1102 arch/x86/kvm/vmx/nested.c lowp = &vmx->nested.msrs.exit_ctls_low; msrs 1103 arch/x86/kvm/vmx/nested.c highp = &vmx->nested.msrs.exit_ctls_high; msrs 1106 arch/x86/kvm/vmx/nested.c lowp = &vmx->nested.msrs.entry_ctls_low; msrs 1107 arch/x86/kvm/vmx/nested.c highp = &vmx->nested.msrs.entry_ctls_high; msrs 1110 arch/x86/kvm/vmx/nested.c lowp = &vmx->nested.msrs.secondary_ctls_low; msrs 1111 arch/x86/kvm/vmx/nested.c highp = &vmx->nested.msrs.secondary_ctls_high; msrs 1142 arch/x86/kvm/vmx/nested.c vmx_misc = vmx_control_msr(vmx->nested.msrs.misc_low, msrs 1143 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.misc_high); msrs 1148 arch/x86/kvm/vmx/nested.c if ((vmx->nested.msrs.pinbased_ctls_high & msrs 1163 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.misc_low = data; msrs 1164 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.misc_high = data >> 32; msrs 1173 arch/x86/kvm/vmx/nested.c vmx_ept_vpid_cap = vmx_control_msr(vmx->nested.msrs.ept_caps, msrs 1174 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.vpid_caps); msrs 1180 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.ept_caps = data; msrs 1181 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.vpid_caps = data >> 32; msrs 1191 arch/x86/kvm/vmx/nested.c msr = &vmx->nested.msrs.cr0_fixed0; msrs 1194 arch/x86/kvm/vmx/nested.c msr = &vmx->nested.msrs.cr4_fixed0; msrs 1265 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.vmcs_enum = data; msrs 1268 arch/x86/kvm/vmx/nested.c if (data & ~vmx->nested.msrs.vmfunc_controls) msrs 1270 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.vmfunc_controls = data; msrs 1281 arch/x86/kvm/vmx/nested.c int vmx_get_vmx_msr(struct nested_vmx_msrs *msrs, u32 msr_index, u64 *pdata) msrs 1285 arch/x86/kvm/vmx/nested.c *pdata = msrs->basic; msrs 1290 arch/x86/kvm/vmx/nested.c msrs->pinbased_ctls_low, msrs 1291 arch/x86/kvm/vmx/nested.c msrs->pinbased_ctls_high); msrs 1298 arch/x86/kvm/vmx/nested.c msrs->procbased_ctls_low, msrs 1299 arch/x86/kvm/vmx/nested.c msrs->procbased_ctls_high); msrs 1306 arch/x86/kvm/vmx/nested.c msrs->exit_ctls_low, msrs 1307 arch/x86/kvm/vmx/nested.c msrs->exit_ctls_high); msrs 1314 arch/x86/kvm/vmx/nested.c msrs->entry_ctls_low, msrs 1315 arch/x86/kvm/vmx/nested.c msrs->entry_ctls_high); msrs 1321 arch/x86/kvm/vmx/nested.c msrs->misc_low, msrs 1322 arch/x86/kvm/vmx/nested.c msrs->misc_high); msrs 1325 arch/x86/kvm/vmx/nested.c *pdata = msrs->cr0_fixed0; msrs 1328 arch/x86/kvm/vmx/nested.c *pdata = msrs->cr0_fixed1; msrs 1331 arch/x86/kvm/vmx/nested.c *pdata = msrs->cr4_fixed0; msrs 1334 arch/x86/kvm/vmx/nested.c *pdata = msrs->cr4_fixed1; msrs 1337 arch/x86/kvm/vmx/nested.c *pdata = msrs->vmcs_enum; msrs 1341 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_low, msrs 1342 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_high); msrs 1345 arch/x86/kvm/vmx/nested.c *pdata = msrs->ept_caps | msrs 1346 arch/x86/kvm/vmx/nested.c ((u64)msrs->vpid_caps << 32); msrs 1349 arch/x86/kvm/vmx/nested.c *pdata = msrs->vmfunc_controls; msrs 2470 arch/x86/kvm/vmx/nested.c if (CC(!(vmx->nested.msrs.ept_caps & VMX_EPTP_UC_BIT))) msrs 2474 arch/x86/kvm/vmx/nested.c if (CC(!(vmx->nested.msrs.ept_caps & VMX_EPTP_WB_BIT))) msrs 2491 arch/x86/kvm/vmx/nested.c if (CC(!(vmx->nested.msrs.ept_caps & VMX_EPT_AD_BIT))) msrs 2507 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.pinbased_ctls_low, msrs 2508 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.pinbased_ctls_high)) || msrs 2510 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.procbased_ctls_low, msrs 2511 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.procbased_ctls_high))) msrs 2516 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.secondary_ctls_low, msrs 2517 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.secondary_ctls_high))) msrs 2544 arch/x86/kvm/vmx/nested.c ~vmx->nested.msrs.vmfunc_controls)) msrs 2566 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.exit_ctls_low, msrs 2567 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.exit_ctls_high)) || msrs 2583 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.entry_ctls_low, msrs 2584 arch/x86/kvm/vmx/nested.c vmx->nested.msrs.entry_ctls_high))) msrs 4912 arch/x86/kvm/vmx/nested.c if (!(vmx->nested.msrs.secondary_ctls_high & msrs 4914 arch/x86/kvm/vmx/nested.c !(vmx->nested.msrs.ept_caps & VMX_EPT_INVEPT_BIT)) { msrs 4925 arch/x86/kvm/vmx/nested.c types = (vmx->nested.msrs.ept_caps >> VMX_EPT_EXTENT_SHIFT) & 6; msrs 4971 arch/x86/kvm/vmx/nested.c if (!(vmx->nested.msrs.secondary_ctls_high & msrs 4973 arch/x86/kvm/vmx/nested.c !(vmx->nested.msrs.vpid_caps & VMX_VPID_INVVPID_BIT)) { msrs 4984 arch/x86/kvm/vmx/nested.c types = (vmx->nested.msrs.vpid_caps & msrs 5793 arch/x86/kvm/vmx/nested.c void nested_vmx_setup_ctls_msrs(struct nested_vmx_msrs *msrs, u32 ept_caps) msrs 5812 arch/x86/kvm/vmx/nested.c msrs->pinbased_ctls_low, msrs 5813 arch/x86/kvm/vmx/nested.c msrs->pinbased_ctls_high); msrs 5814 arch/x86/kvm/vmx/nested.c msrs->pinbased_ctls_low |= msrs 5816 arch/x86/kvm/vmx/nested.c msrs->pinbased_ctls_high &= msrs 5821 arch/x86/kvm/vmx/nested.c msrs->pinbased_ctls_high |= msrs 5827 arch/x86/kvm/vmx/nested.c msrs->exit_ctls_low, msrs 5828 arch/x86/kvm/vmx/nested.c msrs->exit_ctls_high); msrs 5829 arch/x86/kvm/vmx/nested.c msrs->exit_ctls_low = msrs 5832 arch/x86/kvm/vmx/nested.c msrs->exit_ctls_high &= msrs 5837 arch/x86/kvm/vmx/nested.c msrs->exit_ctls_high |= msrs 5843 arch/x86/kvm/vmx/nested.c msrs->exit_ctls_low &= ~VM_EXIT_SAVE_DEBUG_CONTROLS; msrs 5847 arch/x86/kvm/vmx/nested.c msrs->entry_ctls_low, msrs 5848 arch/x86/kvm/vmx/nested.c msrs->entry_ctls_high); msrs 5849 arch/x86/kvm/vmx/nested.c msrs->entry_ctls_low = msrs 5851 arch/x86/kvm/vmx/nested.c msrs->entry_ctls_high &= msrs 5856 arch/x86/kvm/vmx/nested.c msrs->entry_ctls_high |= msrs 5860 arch/x86/kvm/vmx/nested.c msrs->entry_ctls_low &= ~VM_ENTRY_LOAD_DEBUG_CONTROLS; msrs 5864 arch/x86/kvm/vmx/nested.c msrs->procbased_ctls_low, msrs 5865 arch/x86/kvm/vmx/nested.c msrs->procbased_ctls_high); msrs 5866 arch/x86/kvm/vmx/nested.c msrs->procbased_ctls_low = msrs 5868 arch/x86/kvm/vmx/nested.c msrs->procbased_ctls_high &= msrs 5888 arch/x86/kvm/vmx/nested.c msrs->procbased_ctls_high |= msrs 5893 arch/x86/kvm/vmx/nested.c msrs->procbased_ctls_low &= msrs 5900 arch/x86/kvm/vmx/nested.c if (msrs->procbased_ctls_high & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) msrs 5902 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_low, msrs 5903 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_high); msrs 5905 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_low = 0; msrs 5906 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_high &= msrs 5922 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_high |= msrs 5927 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_high |= msrs 5929 arch/x86/kvm/vmx/nested.c msrs->ept_caps = VMX_EPT_PAGE_WALK_4_BIT | msrs 5932 arch/x86/kvm/vmx/nested.c msrs->ept_caps |= msrs 5934 arch/x86/kvm/vmx/nested.c msrs->ept_caps &= ept_caps; msrs 5935 arch/x86/kvm/vmx/nested.c msrs->ept_caps |= VMX_EPT_EXTENT_GLOBAL_BIT | msrs 5939 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_high |= msrs 5941 arch/x86/kvm/vmx/nested.c msrs->ept_caps |= VMX_EPT_AD_BIT; msrs 5946 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_high |= msrs 5953 arch/x86/kvm/vmx/nested.c msrs->vmfunc_controls = msrs 5964 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_high |= msrs 5966 arch/x86/kvm/vmx/nested.c msrs->vpid_caps = VMX_VPID_INVVPID_BIT | msrs 5971 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_high |= msrs 5975 arch/x86/kvm/vmx/nested.c msrs->secondary_ctls_high |= msrs 5980 arch/x86/kvm/vmx/nested.c msrs->misc_low, msrs 5981 arch/x86/kvm/vmx/nested.c msrs->misc_high); msrs 5982 arch/x86/kvm/vmx/nested.c msrs->misc_low &= VMX_MISC_SAVE_EFER_LMA; msrs 5983 arch/x86/kvm/vmx/nested.c msrs->misc_low |= msrs 5987 arch/x86/kvm/vmx/nested.c msrs->misc_high = 0; msrs 5995 arch/x86/kvm/vmx/nested.c msrs->basic = msrs 6002 arch/x86/kvm/vmx/nested.c msrs->basic |= VMX_BASIC_INOUT; msrs 6011 arch/x86/kvm/vmx/nested.c msrs->cr0_fixed0 = VMXON_CR0_ALWAYSON; msrs 6012 arch/x86/kvm/vmx/nested.c msrs->cr4_fixed0 = VMXON_CR4_ALWAYSON; msrs 6015 arch/x86/kvm/vmx/nested.c rdmsrl(MSR_IA32_VMX_CR0_FIXED1, msrs->cr0_fixed1); msrs 6016 arch/x86/kvm/vmx/nested.c rdmsrl(MSR_IA32_VMX_CR4_FIXED1, msrs->cr4_fixed1); msrs 6019 arch/x86/kvm/vmx/nested.c msrs->vmcs_enum = VMCS12_MAX_FIELD_INDEX << 1; msrs 20 arch/x86/kvm/vmx/nested.h void nested_vmx_setup_ctls_msrs(struct nested_vmx_msrs *msrs, u32 ept_caps); msrs 32 arch/x86/kvm/vmx/nested.h int vmx_get_vmx_msr(struct nested_vmx_msrs *msrs, u32 msr_index, u64 *pdata); msrs 119 arch/x86/kvm/vmx/nested.h return vmx_misc_cr3_count(to_vmx(vcpu)->nested.msrs.misc_low); msrs 129 arch/x86/kvm/vmx/nested.h return to_vmx(vcpu)->nested.msrs.misc_low & msrs 135 arch/x86/kvm/vmx/nested.h return to_vmx(vcpu)->nested.msrs.misc_low & VMX_MISC_ZERO_LEN_INS; msrs 140 arch/x86/kvm/vmx/nested.h return to_vmx(vcpu)->nested.msrs.procbased_ctls_high & msrs 146 arch/x86/kvm/vmx/nested.h return to_vmx(vcpu)->nested.msrs.secondary_ctls_high & msrs 262 arch/x86/kvm/vmx/nested.h u64 fixed0 = to_vmx(vcpu)->nested.msrs.cr0_fixed0; msrs 263 arch/x86/kvm/vmx/nested.h u64 fixed1 = to_vmx(vcpu)->nested.msrs.cr0_fixed1; msrs 266 arch/x86/kvm/vmx/nested.h if (to_vmx(vcpu)->nested.msrs.secondary_ctls_high & msrs 276 arch/x86/kvm/vmx/nested.h u64 fixed0 = to_vmx(vcpu)->nested.msrs.cr0_fixed0; msrs 277 arch/x86/kvm/vmx/nested.h u64 fixed1 = to_vmx(vcpu)->nested.msrs.cr0_fixed1; msrs 284 arch/x86/kvm/vmx/nested.h u64 fixed0 = to_vmx(vcpu)->nested.msrs.cr4_fixed0; msrs 285 arch/x86/kvm/vmx/nested.h u64 fixed1 = to_vmx(vcpu)->nested.msrs.cr4_fixed1; msrs 1812 arch/x86/kvm/vmx/vmx.c return vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index, msrs 4038 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high |= msrs 4041 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high &= msrs 4053 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high |= msrs 4056 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high &= msrs 4074 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high |= msrs 4077 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high &= msrs 4089 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high |= msrs 4092 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high &= msrs 4104 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high |= msrs 4107 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high &= msrs 4121 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high |= msrs 4124 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.secondary_ctls_high &= msrs 6415 arch/x86/kvm/vmx/vmx.c struct perf_guest_switch_msr *msrs; msrs 6417 arch/x86/kvm/vmx/vmx.c msrs = perf_guest_get_msrs(&nr_msrs); msrs 6419 arch/x86/kvm/vmx/vmx.c if (!msrs) msrs 6423 arch/x86/kvm/vmx/vmx.c if (msrs[i].host == msrs[i].guest) msrs 6424 arch/x86/kvm/vmx/vmx.c clear_atomic_switch_msr(vmx, msrs[i].msr); msrs 6426 arch/x86/kvm/vmx/vmx.c add_atomic_switch_msr(vmx, msrs[i].msr, msrs[i].guest, msrs 6427 arch/x86/kvm/vmx/vmx.c msrs[i].host, false); msrs 6771 arch/x86/kvm/vmx/vmx.c nested_vmx_setup_ctls_msrs(&vmx->nested.msrs, msrs 6774 arch/x86/kvm/vmx/vmx.c memset(&vmx->nested.msrs, 0, sizeof(vmx->nested.msrs)); msrs 6943 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.cr0_fixed1 = 0xffffffff; msrs 6944 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.cr4_fixed1 = X86_CR4_PCE; msrs 6948 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.cr4_fixed1 |= (_cr4_mask); \ msrs 6985 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.entry_ctls_high |= VM_ENTRY_LOAD_BNDCFGS; msrs 6986 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.exit_ctls_high |= VM_EXIT_CLEAR_BNDCFGS; msrs 6988 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.entry_ctls_high &= ~VM_ENTRY_LOAD_BNDCFGS; msrs 6989 arch/x86/kvm/vmx/vmx.c vmx->nested.msrs.exit_ctls_high &= ~VM_EXIT_CLEAR_BNDCFGS; msrs 173 arch/x86/kvm/vmx/vmx.h struct nested_vmx_msrs msrs; msrs 166 arch/x86/kvm/x86.c u32 msrs[KVM_NR_SHARED_MSRS]; msrs 259 arch/x86/kvm/x86.c wrmsrl(shared_msrs_global.msrs[slot], values->host); msrs 285 arch/x86/kvm/x86.c shared_msrs_global.msrs[slot] = msr; msrs 296 arch/x86/kvm/x86.c shared_msr_update(i, shared_msrs_global.msrs[i]); msrs 308 arch/x86/kvm/x86.c err = wrmsrl_safe(shared_msrs_global.msrs[slot], value); msrs 3199 arch/x86/kvm/x86.c static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs, msrs 3206 arch/x86/kvm/x86.c for (i = 0; i < msrs->nmsrs; ++i) msrs 3223 arch/x86/kvm/x86.c struct kvm_msrs msrs; msrs 3229 arch/x86/kvm/x86.c if (copy_from_user(&msrs, user_msrs, sizeof(msrs))) msrs 3233 arch/x86/kvm/x86.c if (msrs.nmsrs >= MAX_IO_MSRS) msrs 3236 arch/x86/kvm/x86.c size = sizeof(struct kvm_msr_entry) * msrs.nmsrs; msrs 3243 arch/x86/kvm/x86.c r = n = __msr_io(vcpu, &msrs, entries, do_msr); msrs 14 arch/x86/lib/msr-smp.c if (rv->msrs) msrs 15 arch/x86/lib/msr-smp.c reg = per_cpu_ptr(rv->msrs, this_cpu); msrs 28 arch/x86/lib/msr-smp.c if (rv->msrs) msrs 29 arch/x86/lib/msr-smp.c reg = per_cpu_ptr(rv->msrs, this_cpu); msrs 100 arch/x86/lib/msr-smp.c struct msr *msrs, msrs 108 arch/x86/lib/msr-smp.c rv.msrs = msrs; msrs 127 arch/x86/lib/msr-smp.c void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs) msrs 129 arch/x86/lib/msr-smp.c __rwmsr_on_cpus(mask, msr_no, msrs, __rdmsr_on_cpu); msrs 141 arch/x86/lib/msr-smp.c void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs) msrs 143 arch/x86/lib/msr-smp.c __rwmsr_on_cpus(mask, msr_no, msrs, __wrmsr_on_cpu); msrs 11 arch/x86/lib/msr.c struct msr *msrs = NULL; msrs 13 arch/x86/lib/msr.c msrs = alloc_percpu(struct msr); msrs 14 arch/x86/lib/msr.c if (!msrs) { msrs 19 arch/x86/lib/msr.c return msrs; msrs 23 arch/x86/lib/msr.c void msrs_free(struct msr *msrs) msrs 25 arch/x86/lib/msr.c free_percpu(msrs); msrs 75 arch/x86/oprofile/nmi_int.c static void nmi_cpu_save_registers(struct op_msrs *msrs) msrs 77 arch/x86/oprofile/nmi_int.c struct op_msr *counters = msrs->counters; msrs 78 arch/x86/oprofile/nmi_int.c struct op_msr *controls = msrs->controls; msrs 94 arch/x86/oprofile/nmi_int.c struct op_msrs const *msrs = this_cpu_ptr(&cpu_msrs); msrs 95 arch/x86/oprofile/nmi_int.c if (!msrs->controls) msrs 98 arch/x86/oprofile/nmi_int.c model->start(msrs); msrs 114 arch/x86/oprofile/nmi_int.c struct op_msrs const *msrs = this_cpu_ptr(&cpu_msrs); msrs 115 arch/x86/oprofile/nmi_int.c if (!msrs->controls) msrs 118 arch/x86/oprofile/nmi_int.c model->stop(msrs); msrs 181 arch/x86/oprofile/nmi_int.c static void nmi_cpu_setup_mux(int cpu, struct op_msrs const * const msrs) msrs 184 arch/x86/oprofile/nmi_int.c struct op_msr *multiplex = msrs->multiplex; msrs 200 arch/x86/oprofile/nmi_int.c static void nmi_cpu_save_mpx_registers(struct op_msrs *msrs) msrs 202 arch/x86/oprofile/nmi_int.c struct op_msr *counters = msrs->counters; msrs 203 arch/x86/oprofile/nmi_int.c struct op_msr *multiplex = msrs->multiplex; msrs 213 arch/x86/oprofile/nmi_int.c static void nmi_cpu_restore_mpx_registers(struct op_msrs *msrs) msrs 215 arch/x86/oprofile/nmi_int.c struct op_msr *counters = msrs->counters; msrs 216 arch/x86/oprofile/nmi_int.c struct op_msr *multiplex = msrs->multiplex; msrs 230 arch/x86/oprofile/nmi_int.c struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu); msrs 233 arch/x86/oprofile/nmi_int.c nmi_cpu_save_mpx_registers(msrs); msrs 242 arch/x86/oprofile/nmi_int.c model->switch_ctrl(model, msrs); msrs 243 arch/x86/oprofile/nmi_int.c nmi_cpu_restore_mpx_registers(msrs); msrs 297 arch/x86/oprofile/nmi_int.c nmi_cpu_setup_mux(int cpu, struct op_msrs const * const msrs) { } msrs 345 arch/x86/oprofile/nmi_int.c struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu); msrs 347 arch/x86/oprofile/nmi_int.c nmi_cpu_save_registers(msrs); msrs 349 arch/x86/oprofile/nmi_int.c model->setup_ctrs(model, msrs); msrs 350 arch/x86/oprofile/nmi_int.c nmi_cpu_setup_mux(cpu, msrs); msrs 356 arch/x86/oprofile/nmi_int.c static void nmi_cpu_restore_registers(struct op_msrs *msrs) msrs 358 arch/x86/oprofile/nmi_int.c struct op_msr *counters = msrs->counters; msrs 359 arch/x86/oprofile/nmi_int.c struct op_msr *controls = msrs->controls; msrs 377 arch/x86/oprofile/nmi_int.c struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu); msrs 388 arch/x86/oprofile/nmi_int.c nmi_cpu_restore_registers(msrs); msrs 504 arch/x86/oprofile/nmi_int.c struct op_msrs *msrs; msrs 513 arch/x86/oprofile/nmi_int.c msrs = &get_cpu_var(cpu_msrs); msrs 514 arch/x86/oprofile/nmi_int.c model->shutdown(msrs); msrs 133 arch/x86/oprofile/op_model_amd.c struct op_msrs const * const msrs) msrs 269 arch/x86/oprofile/op_model_amd.c struct op_msrs const * const msrs) msrs 279 arch/x86/oprofile/op_model_amd.c rdmsrl(msrs->controls[i].addr, val); msrs 282 arch/x86/oprofile/op_model_amd.c wrmsrl(msrs->controls[i].addr, val); msrs 290 arch/x86/oprofile/op_model_amd.c static void op_amd_shutdown(struct op_msrs const * const msrs) msrs 295 arch/x86/oprofile/op_model_amd.c if (!msrs->counters[i].addr) msrs 302 arch/x86/oprofile/op_model_amd.c static int op_amd_fill_in_addresses(struct op_msrs * const msrs) msrs 315 arch/x86/oprofile/op_model_amd.c msrs->counters[i].addr = MSR_F15H_PERF_CTR + (i << 1); msrs 316 arch/x86/oprofile/op_model_amd.c msrs->controls[i].addr = MSR_F15H_PERF_CTL + (i << 1); msrs 318 arch/x86/oprofile/op_model_amd.c msrs->controls[i].addr = MSR_K7_EVNTSEL0 + i; msrs 319 arch/x86/oprofile/op_model_amd.c msrs->counters[i].addr = MSR_K7_PERFCTR0 + i; msrs 326 arch/x86/oprofile/op_model_amd.c op_amd_shutdown(msrs); msrs 334 arch/x86/oprofile/op_model_amd.c struct op_msrs const * const msrs) msrs 342 arch/x86/oprofile/op_model_amd.c && msrs->counters[op_x86_virt_to_phys(i)].addr) msrs 350 arch/x86/oprofile/op_model_amd.c if (!msrs->controls[i].addr) msrs 352 arch/x86/oprofile/op_model_amd.c rdmsrl(msrs->controls[i].addr, val); msrs 356 arch/x86/oprofile/op_model_amd.c wrmsrl(msrs->controls[i].addr, val); msrs 361 arch/x86/oprofile/op_model_amd.c wrmsrl(msrs->counters[i].addr, -1LL); msrs 371 arch/x86/oprofile/op_model_amd.c wrmsrl(msrs->counters[i].addr, -(u64)reset_value[virt]); msrs 374 arch/x86/oprofile/op_model_amd.c rdmsrl(msrs->controls[i].addr, val); msrs 377 arch/x86/oprofile/op_model_amd.c wrmsrl(msrs->controls[i].addr, val); msrs 382 arch/x86/oprofile/op_model_amd.c struct op_msrs const * const msrs) msrs 391 arch/x86/oprofile/op_model_amd.c rdmsrl(msrs->counters[i].addr, val); msrs 396 arch/x86/oprofile/op_model_amd.c wrmsrl(msrs->counters[i].addr, -(u64)reset_value[virt]); msrs 399 arch/x86/oprofile/op_model_amd.c op_amd_handle_ibs(regs, msrs); msrs 405 arch/x86/oprofile/op_model_amd.c static void op_amd_start(struct op_msrs const * const msrs) msrs 413 arch/x86/oprofile/op_model_amd.c rdmsrl(msrs->controls[i].addr, val); msrs 415 arch/x86/oprofile/op_model_amd.c wrmsrl(msrs->controls[i].addr, val); msrs 421 arch/x86/oprofile/op_model_amd.c static void op_amd_stop(struct op_msrs const * const msrs) msrs 433 arch/x86/oprofile/op_model_amd.c rdmsrl(msrs->controls[i].addr, val); msrs 435 arch/x86/oprofile/op_model_amd.c wrmsrl(msrs->controls[i].addr, val); msrs 388 arch/x86/oprofile/op_model_p4.c static void p4_shutdown(struct op_msrs const * const msrs) msrs 393 arch/x86/oprofile/op_model_p4.c if (msrs->counters[i].addr) msrs 394 arch/x86/oprofile/op_model_p4.c release_perfctr_nmi(msrs->counters[i].addr); msrs 402 arch/x86/oprofile/op_model_p4.c if (msrs->controls[i].addr) msrs 403 arch/x86/oprofile/op_model_p4.c release_evntsel_nmi(msrs->controls[i].addr); msrs 407 arch/x86/oprofile/op_model_p4.c static int p4_fill_in_addresses(struct op_msrs * const msrs) msrs 420 arch/x86/oprofile/op_model_p4.c msrs->counters[i].addr = addr; msrs 421 arch/x86/oprofile/op_model_p4.c msrs->controls[i].addr = cccraddr; msrs 429 arch/x86/oprofile/op_model_p4.c msrs->controls[i].addr = addr; msrs 438 arch/x86/oprofile/op_model_p4.c msrs->controls[i].addr = addr; msrs 444 arch/x86/oprofile/op_model_p4.c msrs->controls[i].addr = addr; msrs 451 arch/x86/oprofile/op_model_p4.c msrs->controls[i].addr = addr; msrs 457 arch/x86/oprofile/op_model_p4.c msrs->controls[i].addr = addr; msrs 463 arch/x86/oprofile/op_model_p4.c msrs->controls[i].addr = addr; msrs 471 arch/x86/oprofile/op_model_p4.c msrs->controls[i++].addr = MSR_P4_CRU_ESCR5; msrs 473 arch/x86/oprofile/op_model_p4.c msrs->controls[i++].addr = MSR_P4_CRU_ESCR4; msrs 479 arch/x86/oprofile/op_model_p4.c msrs->controls[i++].addr = MSR_P4_CRU_ESCR4; msrs 485 arch/x86/oprofile/op_model_p4.c msrs->controls[i++].addr = MSR_P4_CRU_ESCR5; msrs 486 arch/x86/oprofile/op_model_p4.c msrs->controls[i++].addr = MSR_P4_CRU_ESCR5; msrs 493 arch/x86/oprofile/op_model_p4.c if (msrs->controls[i].addr) msrs 496 arch/x86/oprofile/op_model_p4.c p4_shutdown(msrs); msrs 570 arch/x86/oprofile/op_model_p4.c struct op_msrs const * const msrs) msrs 586 arch/x86/oprofile/op_model_p4.c if (unlikely(!msrs->controls[i].addr)) msrs 596 arch/x86/oprofile/op_model_p4.c if (unlikely(!msrs->controls[i].addr)) msrs 598 arch/x86/oprofile/op_model_p4.c wrmsr(msrs->controls[i].addr, 0, 0); msrs 603 arch/x86/oprofile/op_model_p4.c if (counter_config[i].enabled && msrs->controls[i].addr) { msrs 616 arch/x86/oprofile/op_model_p4.c struct op_msrs const * const msrs) msrs 668 arch/x86/oprofile/op_model_p4.c static void p4_start(struct op_msrs const * const msrs) msrs 685 arch/x86/oprofile/op_model_p4.c static void p4_stop(struct op_msrs const * const msrs) msrs 33 arch/x86/oprofile/op_model_ppro.c static void ppro_shutdown(struct op_msrs const * const msrs) msrs 38 arch/x86/oprofile/op_model_ppro.c if (!msrs->counters[i].addr) msrs 45 arch/x86/oprofile/op_model_ppro.c static int ppro_fill_in_addresses(struct op_msrs * const msrs) msrs 57 arch/x86/oprofile/op_model_ppro.c msrs->counters[i].addr = MSR_P6_PERFCTR0 + i; msrs 58 arch/x86/oprofile/op_model_ppro.c msrs->controls[i].addr = MSR_P6_EVNTSEL0 + i; msrs 64 arch/x86/oprofile/op_model_ppro.c ppro_shutdown(msrs); msrs 73 arch/x86/oprofile/op_model_ppro.c struct op_msrs const * const msrs) msrs 97 arch/x86/oprofile/op_model_ppro.c if (!msrs->controls[i].addr) msrs 99 arch/x86/oprofile/op_model_ppro.c rdmsrl(msrs->controls[i].addr, val); msrs 103 arch/x86/oprofile/op_model_ppro.c wrmsrl(msrs->controls[i].addr, val); msrs 108 arch/x86/oprofile/op_model_ppro.c wrmsrl(msrs->counters[i].addr, -1LL); msrs 113 arch/x86/oprofile/op_model_ppro.c if (counter_config[i].enabled && msrs->counters[i].addr) { msrs 115 arch/x86/oprofile/op_model_ppro.c wrmsrl(msrs->counters[i].addr, -reset_value[i]); msrs 116 arch/x86/oprofile/op_model_ppro.c rdmsrl(msrs->controls[i].addr, val); msrs 119 arch/x86/oprofile/op_model_ppro.c wrmsrl(msrs->controls[i].addr, val); msrs 128 arch/x86/oprofile/op_model_ppro.c struct op_msrs const * const msrs) msrs 136 arch/x86/oprofile/op_model_ppro.c rdmsrl(msrs->counters[i].addr, val); msrs 140 arch/x86/oprofile/op_model_ppro.c wrmsrl(msrs->counters[i].addr, -reset_value[i]); msrs 158 arch/x86/oprofile/op_model_ppro.c static void ppro_start(struct op_msrs const * const msrs) msrs 165 arch/x86/oprofile/op_model_ppro.c rdmsrl(msrs->controls[i].addr, val); msrs 167 arch/x86/oprofile/op_model_ppro.c wrmsrl(msrs->controls[i].addr, val); msrs 173 arch/x86/oprofile/op_model_ppro.c static void ppro_stop(struct op_msrs const * const msrs) msrs 181 arch/x86/oprofile/op_model_ppro.c rdmsrl(msrs->controls[i].addr, val); msrs 183 arch/x86/oprofile/op_model_ppro.c wrmsrl(msrs->controls[i].addr, val); msrs 43 arch/x86/oprofile/op_x86_model.h int (*fill_in_addresses)(struct op_msrs * const msrs); msrs 45 arch/x86/oprofile/op_x86_model.h struct op_msrs const * const msrs); msrs 47 arch/x86/oprofile/op_x86_model.h struct op_msrs const * const msrs); msrs 48 arch/x86/oprofile/op_x86_model.h void (*start)(struct op_msrs const * const msrs); msrs 49 arch/x86/oprofile/op_x86_model.h void (*stop)(struct op_msrs const * const msrs); msrs 50 arch/x86/oprofile/op_x86_model.h void (*shutdown)(struct op_msrs const * const msrs); msrs 53 arch/x86/oprofile/op_x86_model.h struct op_msrs const * const msrs); msrs 17 drivers/edac/amd64_edac.c static struct msr __percpu *msrs; msrs 3047 drivers/edac/amd64_edac.c rdmsr_on_cpus(mask, MSR_IA32_MCG_CTL, msrs); msrs 3050 drivers/edac/amd64_edac.c struct msr *reg = per_cpu_ptr(msrs, cpu); msrs 3079 drivers/edac/amd64_edac.c rdmsr_on_cpus(cmask, MSR_IA32_MCG_CTL, msrs); msrs 3083 drivers/edac/amd64_edac.c struct msr *reg = per_cpu_ptr(msrs, cpu); msrs 3098 drivers/edac/amd64_edac.c wrmsr_on_cpus(cmask, MSR_IA32_MCG_CTL, msrs); msrs 3669 drivers/edac/amd64_edac.c msrs = msrs_alloc(); msrs 3670 drivers/edac/amd64_edac.c if (!msrs) msrs 3711 drivers/edac/amd64_edac.c msrs_free(msrs); msrs 3712 drivers/edac/amd64_edac.c msrs = NULL; msrs 3742 drivers/edac/amd64_edac.c msrs_free(msrs); msrs 3743 drivers/edac/amd64_edac.c msrs = NULL; msrs 1000 tools/testing/selftests/kvm/lib/x86_64/processor.c struct kvm_msrs msrs; msrs 1046 tools/testing/selftests/kvm/lib/x86_64/processor.c state = malloc(sizeof(*state) + nmsrs * sizeof(state->msrs.entries[0])); msrs 1084 tools/testing/selftests/kvm/lib/x86_64/processor.c state->msrs.nmsrs = nmsrs; msrs 1086 tools/testing/selftests/kvm/lib/x86_64/processor.c state->msrs.entries[i].index = list->indices[i]; msrs 1087 tools/testing/selftests/kvm/lib/x86_64/processor.c r = ioctl(vcpu->fd, KVM_GET_MSRS, &state->msrs); msrs 1118 tools/testing/selftests/kvm/lib/x86_64/processor.c r = ioctl(vcpu->fd, KVM_SET_MSRS, &state->msrs); msrs 1119 tools/testing/selftests/kvm/lib/x86_64/processor.c TEST_ASSERT(r == state->msrs.nmsrs, "Unexpected result from KVM_SET_MSRS, r: %i (failed at %x)", msrs 1120 tools/testing/selftests/kvm/lib/x86_64/processor.c r, r == state->msrs.nmsrs ? -1 : state->msrs.entries[r].index);