msr_b             403 arch/x86/events/intel/pt.c 	unsigned long	msr_b;
msr_b             408 arch/x86/events/intel/pt.c 		.msr_b	 = MSR_IA32_RTIT_ADDR0_B,
msr_b             413 arch/x86/events/intel/pt.c 		.msr_b	 = MSR_IA32_RTIT_ADDR1_B,
msr_b             418 arch/x86/events/intel/pt.c 		.msr_b	 = MSR_IA32_RTIT_ADDR2_B,
msr_b             423 arch/x86/events/intel/pt.c 		.msr_b	 = MSR_IA32_RTIT_ADDR3_B,
msr_b             458 arch/x86/events/intel/pt.c 		if (pt->filters.filter[range].msr_b != filter->msr_b) {
msr_b             459 arch/x86/events/intel/pt.c 			wrmsrl(pt_address_ranges[range].msr_b, filter->msr_b);
msr_b             460 arch/x86/events/intel/pt.c 			pt->filters.filter[range].msr_b = filter->msr_b;
msr_b            1301 arch/x86/events/intel/pt.c 	unsigned long msr_a, msr_b;
msr_b            1312 arch/x86/events/intel/pt.c 			msr_a = msr_b = 0;
msr_b            1316 arch/x86/events/intel/pt.c 			msr_b = msr_a + fr[range].size - 1;
msr_b            1320 arch/x86/events/intel/pt.c 		filters->filter[range].msr_b  = msr_b;
msr_b              98 arch/x86/events/intel/pt.h 	unsigned long	msr_b;