msr_a 402 arch/x86/events/intel/pt.c unsigned long msr_a; msr_a 407 arch/x86/events/intel/pt.c .msr_a = MSR_IA32_RTIT_ADDR0_A, msr_a 412 arch/x86/events/intel/pt.c .msr_a = MSR_IA32_RTIT_ADDR1_A, msr_a 417 arch/x86/events/intel/pt.c .msr_a = MSR_IA32_RTIT_ADDR2_A, msr_a 422 arch/x86/events/intel/pt.c .msr_a = MSR_IA32_RTIT_ADDR3_A, msr_a 453 arch/x86/events/intel/pt.c if (pt->filters.filter[range].msr_a != filter->msr_a) { msr_a 454 arch/x86/events/intel/pt.c wrmsrl(pt_address_ranges[range].msr_a, filter->msr_a); msr_a 455 arch/x86/events/intel/pt.c pt->filters.filter[range].msr_a = filter->msr_a; msr_a 1301 arch/x86/events/intel/pt.c unsigned long msr_a, msr_b; msr_a 1312 arch/x86/events/intel/pt.c msr_a = msr_b = 0; msr_a 1315 arch/x86/events/intel/pt.c msr_a = fr[range].start; msr_a 1316 arch/x86/events/intel/pt.c msr_b = msr_a + fr[range].size - 1; msr_a 1319 arch/x86/events/intel/pt.c filters->filter[range].msr_a = msr_a; msr_a 97 arch/x86/events/intel/pt.h unsigned long msr_a;