msi_rearm 80 drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c pci->func->msi_rearm(pci); msi_rearm 148 drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c pci->func->msi_rearm(pci); msi_rearm 223 drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c if (pci->msi && func->msi_rearm) { msi_rearm 139 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c .msi_rearm = nv46_pci_msi_rearm, msi_rearm 40 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.c .msi_rearm = nv46_pci_msi_rearm, msi_rearm 32 drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c .msi_rearm = nv40_pci_msi_rearm, msi_rearm 85 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c .msi_rearm = gf100_pci_msi_rearm, msi_rearm 32 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.c .msi_rearm = nv40_pci_msi_rearm, msi_rearm 211 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c .msi_rearm = nv40_pci_msi_rearm, msi_rearm 37 drivers/gpu/drm/nouveau/nvkm/subdev/pci/gp100.c .msi_rearm = gp100_pci_msi_rearm, msi_rearm 58 drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.c .msi_rearm = nv40_pci_msi_rearm, msi_rearm 44 drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv46.c .msi_rearm = nv46_pci_msi_rearm, msi_rearm 15 drivers/gpu/drm/nouveau/nvkm/subdev/pci/priv.h void (*msi_rearm)(struct nvkm_pci *); msi_rearm 772 drivers/gpu/drm/radeon/r100.c uint32_t status, msi_rearm; msi_rearm 822 drivers/gpu/drm/radeon/r100.c msi_rearm = RREG32(RADEON_AIC_CNTL) & ~RS400_MSI_REARM; msi_rearm 823 drivers/gpu/drm/radeon/r100.c WREG32(RADEON_AIC_CNTL, msi_rearm); msi_rearm 824 drivers/gpu/drm/radeon/r100.c WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM); msi_rearm 774 drivers/gpu/drm/radeon/rs600.c u32 status, msi_rearm; msi_rearm 833 drivers/gpu/drm/radeon/rs600.c msi_rearm = RREG32(RADEON_BUS_CNTL) & ~RS600_MSI_REARM; msi_rearm 834 drivers/gpu/drm/radeon/rs600.c WREG32(RADEON_BUS_CNTL, msi_rearm); msi_rearm 835 drivers/gpu/drm/radeon/rs600.c WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM);