mrq_expansion_mode  553 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 			MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode,
mrq_expansion_mode  860 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 			MRQ_EXPANSION_MODE, &rq_regs->mrq_expansion_mode,
mrq_expansion_mode  173 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				pool->hubps[i]->inst, rq_regs->drq_expansion_mode, rq_regs->prq_expansion_mode, rq_regs->mrq_expansion_mode,
mrq_expansion_mode  212 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c 				pool->hubps[i]->inst, rq_regs->drq_expansion_mode, rq_regs->prq_expansion_mode, rq_regs->mrq_expansion_mode,
mrq_expansion_mode  201 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 			MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode,
mrq_expansion_mode 1058 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 			MRQ_EXPANSION_MODE, &rq_regs->mrq_expansion_mode,
mrq_expansion_mode  127 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c 			MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode,
mrq_expansion_mode  218 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	rq_regs->mrq_expansion_mode = 1;
mrq_expansion_mode  218 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	rq_regs->mrq_expansion_mode = 1;
mrq_expansion_mode  199 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	rq_regs->mrq_expansion_mode = 1;
mrq_expansion_mode  499 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h 	unsigned int mrq_expansion_mode;
mrq_expansion_mode  188 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c 	dml_print("DML_RQ_DLG_CALC:    mrq_expansion_mode  = 0x%0x\n", rq_regs.mrq_expansion_mode);
mrq_expansion_mode  255 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	rq_regs->mrq_expansion_mode = 1;