mr_cache          649 drivers/infiniband/hw/mlx5/mr.c 			ent->limit = dev->mdev->profile->mr_cache[i].limit;
mr_cache          107 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[0]	= {
mr_cache          111 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[1]	= {
mr_cache          115 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[2]	= {
mr_cache          119 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[3]	= {
mr_cache          123 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[4]	= {
mr_cache          127 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[5]	= {
mr_cache          131 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[6]	= {
mr_cache          135 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[7]	= {
mr_cache          139 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[8]	= {
mr_cache          143 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[9]	= {
mr_cache          147 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[10]	= {
mr_cache          151 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[11]	= {
mr_cache          155 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[12]	= {
mr_cache          159 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[13]	= {
mr_cache          163 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[14]	= {
mr_cache          167 drivers/net/ethernet/mellanox/mlx5/core/main.c 		.mr_cache[15]	= {
mr_cache         1113 include/linux/mlx5/driver.h 	} mr_cache[MAX_MR_CACHE_ENTRIES];