mpll_ss2 4046 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); mpll_ss2 4858 drivers/gpu/drm/amd/amdgpu/si_dpm.c cpu_to_be32(si_pi->clock_registers.mpll_ss2); mpll_ss2 5059 drivers/gpu/drm/amd/amdgpu/si_dpm.c cpu_to_be32(si_pi->clock_registers.mpll_ss2); mpll_ss2 5352 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 mpll_ss2 = si_pi->clock_registers.mpll_ss2; mpll_ss2 5397 drivers/gpu/drm/amd/amdgpu/si_dpm.c mpll_ss2 &= ~CLKS_MASK; mpll_ss2 5398 drivers/gpu/drm/amd/amdgpu/si_dpm.c mpll_ss2 |= CLKS(clks); mpll_ss2 5419 drivers/gpu/drm/amd/amdgpu/si_dpm.c mclk->vMPLL_SS2 = cpu_to_be32(mpll_ss2); mpll_ss2 362 drivers/gpu/drm/amd/amdgpu/si_dpm.h u32 mpll_ss2; mpll_ss2 508 drivers/gpu/drm/amd/amdgpu/si_dpm.h u32 mpll_ss2; mpll_ss2 523 drivers/gpu/drm/amd/amdgpu/si_dpm.h u32 mpll_ss2; mpll_ss2 920 drivers/gpu/drm/amd/amdgpu/si_dpm.h u32 mpll_ss2; mpll_ss2 1038 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t mpll_ss2 = data->clock_registers.vMPLL_SS2; mpll_ss2 1091 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); mpll_ss2 1112 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c mclk->MpllSs2 = mpll_ss2; mpll_ss2 1062 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c uint32_t mpll_ss2 = data->clock_registers.vMPLL_SS2; mpll_ss2 1141 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); mpll_ss2 1164 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c mclk->MpllSs2 = mpll_ss2; mpll_ss2 805 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c uint32_t mpll_ss2 = data->clock_registers.vMPLL_SS2; mpll_ss2 893 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mpll_ss2 = PHM_SET_FIELD(mpll_ss2, MPLL_SS2, CLKS, clks); mpll_ss2 915 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mclk->MpllSs2 = mpll_ss2; mpll_ss2 1894 drivers/gpu/drm/radeon/ci_dpm.c pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); mpll_ss2 2803 drivers/gpu/drm/radeon/ci_dpm.c u32 mpll_ss2 = pi->clock_registers.mpll_ss2; mpll_ss2 2848 drivers/gpu/drm/radeon/ci_dpm.c mpll_ss2 &= ~CLKS_MASK; mpll_ss2 2849 drivers/gpu/drm/radeon/ci_dpm.c mpll_ss2 |= CLKS(clks); mpll_ss2 2870 drivers/gpu/drm/radeon/ci_dpm.c mclk->MpllSs2 = mpll_ss2; mpll_ss2 3085 drivers/gpu/drm/radeon/ci_dpm.c table->MemoryACPILevel.MpllSs2 = cpu_to_be32(pi->clock_registers.mpll_ss2); mpll_ss2 142 drivers/gpu/drm/radeon/ci_dpm.h u32 mpll_ss2; mpll_ss2 494 drivers/gpu/drm/radeon/cypress_dpm.c u32 mpll_ss2 = pi->clk_regs.rv770.mpll_ss2; mpll_ss2 569 drivers/gpu/drm/radeon/cypress_dpm.c mpll_ss2 &= ~CLKS_MASK; mpll_ss2 570 drivers/gpu/drm/radeon/cypress_dpm.c mpll_ss2 |= CLKS(clk_s); mpll_ss2 606 drivers/gpu/drm/radeon/cypress_dpm.c mclk->mclk770.vMPLL_SS2 = cpu_to_be32(mpll_ss2); mpll_ss2 1260 drivers/gpu/drm/radeon/cypress_dpm.c cpu_to_be32(pi->clk_regs.rv770.mpll_ss2); mpll_ss2 1198 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); mpll_ss2 1707 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.mpll_ss2); mpll_ss2 2176 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_ss2 = ni_pi->clock_registers.mpll_ss2; mpll_ss2 2251 drivers/gpu/drm/radeon/ni_dpm.c mpll_ss2 &= ~CLKS_MASK; mpll_ss2 2252 drivers/gpu/drm/radeon/ni_dpm.c mpll_ss2 |= CLKS(clk_s); mpll_ss2 2289 drivers/gpu/drm/radeon/ni_dpm.c mclk->vMPLL_SS2 = cpu_to_be32(mpll_ss2); mpll_ss2 44 drivers/gpu/drm/radeon/ni_dpm.h u32 mpll_ss2; mpll_ss2 129 drivers/gpu/drm/radeon/rv730_dpm.c u32 mpll_ss2 = pi->clk_regs.rv730.mpll_ss2; mpll_ss2 179 drivers/gpu/drm/radeon/rv730_dpm.c mpll_ss2 &= ~CLK_V_MASK; mpll_ss2 192 drivers/gpu/drm/radeon/rv730_dpm.c mclk->mclk730.vMPLL_SS2 = cpu_to_be32(mpll_ss2); mpll_ss2 224 drivers/gpu/drm/radeon/rv730_dpm.c pi->clk_regs.rv730.mpll_ss2 = mpll_ss2 339 drivers/gpu/drm/radeon/rv730_dpm.c cpu_to_be32(pi->clk_regs.rv730.mpll_ss2); mpll_ss2 198 drivers/gpu/drm/radeon/rv740_dpm.c u32 mpll_ss2 = pi->clk_regs.rv770.mpll_ss2; mpll_ss2 260 drivers/gpu/drm/radeon/rv740_dpm.c mpll_ss2 &= ~CLKS_MASK; mpll_ss2 261 drivers/gpu/drm/radeon/rv740_dpm.c mpll_ss2 |= CLKS(clk_s); mpll_ss2 279 drivers/gpu/drm/radeon/rv740_dpm.c mclk->mclk770.vMPLL_SS2 = cpu_to_be32(mpll_ss2); mpll_ss2 311 drivers/gpu/drm/radeon/rv740_dpm.c pi->clk_regs.rv770.mpll_ss2 = RREG32(MPLL_SS2); mpll_ss2 1046 drivers/gpu/drm/radeon/rv770_dpm.c cpu_to_be32(pi->clk_regs.rv770.mpll_ss2); mpll_ss2 42 drivers/gpu/drm/radeon/rv770_dpm.h u32 mpll_ss2; mpll_ss2 57 drivers/gpu/drm/radeon/rv770_dpm.h u32 mpll_ss2; mpll_ss2 3586 drivers/gpu/drm/radeon/si_dpm.c si_pi->clock_registers.mpll_ss2 = RREG32(MPLL_SS2); mpll_ss2 4394 drivers/gpu/drm/radeon/si_dpm.c cpu_to_be32(si_pi->clock_registers.mpll_ss2); mpll_ss2 4596 drivers/gpu/drm/radeon/si_dpm.c cpu_to_be32(si_pi->clock_registers.mpll_ss2); mpll_ss2 4890 drivers/gpu/drm/radeon/si_dpm.c u32 mpll_ss2 = si_pi->clock_registers.mpll_ss2; mpll_ss2 4935 drivers/gpu/drm/radeon/si_dpm.c mpll_ss2 &= ~CLKS_MASK; mpll_ss2 4936 drivers/gpu/drm/radeon/si_dpm.c mpll_ss2 |= CLKS(clks); mpll_ss2 4957 drivers/gpu/drm/radeon/si_dpm.c mclk->vMPLL_SS2 = cpu_to_be32(mpll_ss2); mpll_ss2 104 drivers/gpu/drm/radeon/si_dpm.h u32 mpll_ss2;