mpll_func_cntl_2 4044 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	si_pi->clock_registers.mpll_func_cntl_2 = RREG32(MPLL_FUNC_CNTL_2);
mpll_func_cntl_2 4854 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		cpu_to_be32(si_pi->clock_registers.mpll_func_cntl_2);
mpll_func_cntl_2 4967 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32 mpll_func_cntl_2 = si_pi->clock_registers.mpll_func_cntl_2;
mpll_func_cntl_2 5055 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		cpu_to_be32(mpll_func_cntl_2);
mpll_func_cntl_2 5350 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32  mpll_func_cntl_2 = si_pi->clock_registers.mpll_func_cntl_2;
mpll_func_cntl_2 5413 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	mclk->vMPLL_FUNC_CNTL_2 = cpu_to_be32(mpll_func_cntl_2);
mpll_func_cntl_2  918 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	u32 mpll_func_cntl_2;
mpll_func_cntl_2 1036 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint32_t  mpll_func_cntl_2 = data->clock_registers.vMPLL_FUNC_CNTL_2;
mpll_func_cntl_2 1106 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	mclk->MpllFuncCntl_2  = mpll_func_cntl_2;
mpll_func_cntl_2 1060 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint32_t  mpll_func_cntl_2 = data->clock_registers.vMPLL_FUNC_CNTL_2;
mpll_func_cntl_2 1158 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	mclk->MpllFuncCntl_2  = mpll_func_cntl_2;
mpll_func_cntl_2  803 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	uint32_t mpll_func_cntl_2 = data->clock_registers.vMPLL_FUNC_CNTL_2;
mpll_func_cntl_2  909 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	mclk->MpllFuncCntl_2  = mpll_func_cntl_2;
mpll_func_cntl_2 1892 drivers/gpu/drm/radeon/ci_dpm.c 	pi->clock_registers.mpll_func_cntl_2 = RREG32(MPLL_FUNC_CNTL_2);
mpll_func_cntl_2 2801 drivers/gpu/drm/radeon/ci_dpm.c 	u32  mpll_func_cntl_2 = pi->clock_registers.mpll_func_cntl_2;
mpll_func_cntl_2 2864 drivers/gpu/drm/radeon/ci_dpm.c 	mclk->MpllFuncCntl_2 = mpll_func_cntl_2;
mpll_func_cntl_2 3083 drivers/gpu/drm/radeon/ci_dpm.c 		cpu_to_be32(pi->clock_registers.mpll_func_cntl_2);
mpll_func_cntl_2  140 drivers/gpu/drm/radeon/ci_dpm.h 	u32 mpll_func_cntl_2;
mpll_func_cntl_2  126 drivers/gpu/drm/radeon/rv730_dpm.c 	u32 mpll_func_cntl_2 = pi->clk_regs.rv730.mpll_func_cntl2;
mpll_func_cntl_2  189 drivers/gpu/drm/radeon/rv730_dpm.c 	mclk->mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2);
mpll_func_cntl_2  233 drivers/gpu/drm/radeon/rv730_dpm.c 	u32 mpll_func_cntl_2 = 0 ;
mpll_func_cntl_2  258 drivers/gpu/drm/radeon/rv730_dpm.c 	mpll_func_cntl_2 = pi->clk_regs.rv730.mpll_func_cntl2;
mpll_func_cntl_2  264 drivers/gpu/drm/radeon/rv730_dpm.c 	mpll_func_cntl_2 &= ~MCLK_MUX_SEL_MASK;
mpll_func_cntl_2  265 drivers/gpu/drm/radeon/rv730_dpm.c 	mpll_func_cntl_2 |= MCLK_MUX_SEL(1);
mpll_func_cntl_2  297 drivers/gpu/drm/radeon/rv730_dpm.c 	table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2);
mpll_func_cntl_2 3584 drivers/gpu/drm/radeon/si_dpm.c 	si_pi->clock_registers.mpll_func_cntl_2 = RREG32(MPLL_FUNC_CNTL_2);
mpll_func_cntl_2 4390 drivers/gpu/drm/radeon/si_dpm.c 		cpu_to_be32(si_pi->clock_registers.mpll_func_cntl_2);
mpll_func_cntl_2 4505 drivers/gpu/drm/radeon/si_dpm.c 	u32 mpll_func_cntl_2 = si_pi->clock_registers.mpll_func_cntl_2;
mpll_func_cntl_2 4592 drivers/gpu/drm/radeon/si_dpm.c 		cpu_to_be32(mpll_func_cntl_2);
mpll_func_cntl_2 4888 drivers/gpu/drm/radeon/si_dpm.c 	u32  mpll_func_cntl_2 = si_pi->clock_registers.mpll_func_cntl_2;
mpll_func_cntl_2 4951 drivers/gpu/drm/radeon/si_dpm.c 	mclk->vMPLL_FUNC_CNTL_2 = cpu_to_be32(mpll_func_cntl_2);
mpll_func_cntl_2  102 drivers/gpu/drm/radeon/si_dpm.h 	u32 mpll_func_cntl_2;