mpll_dq_func_cntl_2  360 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	u32 mpll_dq_func_cntl_2;
mpll_dq_func_cntl_2  504 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	u32 mpll_dq_func_cntl_2;
mpll_dq_func_cntl_2  487 drivers/gpu/drm/radeon/cypress_dpm.c 	u32 mpll_dq_func_cntl_2 =
mpll_dq_func_cntl_2  488 drivers/gpu/drm/radeon/cypress_dpm.c 		pi->clk_regs.rv770.mpll_dq_func_cntl_2;
mpll_dq_func_cntl_2  549 drivers/gpu/drm/radeon/cypress_dpm.c 			mpll_dq_func_cntl_2 |= VCO_MODE;
mpll_dq_func_cntl_2  551 drivers/gpu/drm/radeon/cypress_dpm.c 			mpll_dq_func_cntl_2 &= ~VCO_MODE;
mpll_dq_func_cntl_2  602 drivers/gpu/drm/radeon/cypress_dpm.c 	mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
mpll_dq_func_cntl_2 1251 drivers/gpu/drm/radeon/cypress_dpm.c 		cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl_2);
mpll_dq_func_cntl_2 1342 drivers/gpu/drm/radeon/cypress_dpm.c 	u32 mpll_dq_func_cntl_2 =
mpll_dq_func_cntl_2 1343 drivers/gpu/drm/radeon/cypress_dpm.c 		pi->clk_regs.rv770.mpll_dq_func_cntl_2;
mpll_dq_func_cntl_2 1398 drivers/gpu/drm/radeon/cypress_dpm.c 	mpll_dq_func_cntl_2 |= BIAS_GEN_PDNB | RESET_EN | BYPASS;
mpll_dq_func_cntl_2 1441 drivers/gpu/drm/radeon/cypress_dpm.c 		cpu_to_be32(mpll_dq_func_cntl_2);
mpll_dq_func_cntl_2 1194 drivers/gpu/drm/radeon/ni_dpm.c 	ni_pi->clock_registers.mpll_dq_func_cntl_2 = RREG32(MPLL_DQ_FUNC_CNTL_2);
mpll_dq_func_cntl_2 1699 drivers/gpu/drm/radeon/ni_dpm.c 		cpu_to_be32(ni_pi->clock_registers.mpll_dq_func_cntl_2);
mpll_dq_func_cntl_2 1801 drivers/gpu/drm/radeon/ni_dpm.c 	u32 mpll_dq_func_cntl_2 = ni_pi->clock_registers.mpll_dq_func_cntl_2;
mpll_dq_func_cntl_2 1872 drivers/gpu/drm/radeon/ni_dpm.c 	mpll_dq_func_cntl_2 |= BIAS_GEN_PDNB | RESET_EN | BYPASS;
mpll_dq_func_cntl_2 1908 drivers/gpu/drm/radeon/ni_dpm.c 	table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
mpll_dq_func_cntl_2 2172 drivers/gpu/drm/radeon/ni_dpm.c 	u32 mpll_dq_func_cntl_2 = ni_pi->clock_registers.mpll_dq_func_cntl_2;
mpll_dq_func_cntl_2 2231 drivers/gpu/drm/radeon/ni_dpm.c 			mpll_dq_func_cntl_2 |= VCO_MODE;
mpll_dq_func_cntl_2 2233 drivers/gpu/drm/radeon/ni_dpm.c 			mpll_dq_func_cntl_2 &= ~VCO_MODE;
mpll_dq_func_cntl_2 2285 drivers/gpu/drm/radeon/ni_dpm.c 	mclk->vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
mpll_dq_func_cntl_2   42 drivers/gpu/drm/radeon/ni_dpm.h 	u32 mpll_dq_func_cntl_2;
mpll_dq_func_cntl_2  194 drivers/gpu/drm/radeon/rv740_dpm.c 	u32 mpll_dq_func_cntl_2 = pi->clk_regs.rv770.mpll_dq_func_cntl_2;
mpll_dq_func_cntl_2  240 drivers/gpu/drm/radeon/rv740_dpm.c 			mpll_dq_func_cntl_2 |= VCO_MODE;
mpll_dq_func_cntl_2  242 drivers/gpu/drm/radeon/rv740_dpm.c 			mpll_dq_func_cntl_2 &= ~VCO_MODE;
mpll_dq_func_cntl_2  275 drivers/gpu/drm/radeon/rv740_dpm.c 	mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
mpll_dq_func_cntl_2  305 drivers/gpu/drm/radeon/rv740_dpm.c 	pi->clk_regs.rv770.mpll_dq_func_cntl_2 =
mpll_dq_func_cntl_2  321 drivers/gpu/drm/radeon/rv740_dpm.c 	u32 mpll_dq_func_cntl_2 = pi->clk_regs.rv770.mpll_dq_func_cntl_2;
mpll_dq_func_cntl_2  348 drivers/gpu/drm/radeon/rv740_dpm.c 	mpll_dq_func_cntl_2 |= BYPASS | BIAS_GEN_PDNB | RESET_EN;
mpll_dq_func_cntl_2  376 drivers/gpu/drm/radeon/rv740_dpm.c 	table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
mpll_dq_func_cntl_2  397 drivers/gpu/drm/radeon/rv770_dpm.c 	u32 mpll_dq_func_cntl_2 =
mpll_dq_func_cntl_2  398 drivers/gpu/drm/radeon/rv770_dpm.c 		pi->clk_regs.rv770.mpll_dq_func_cntl_2;
mpll_dq_func_cntl_2  467 drivers/gpu/drm/radeon/rv770_dpm.c 			mpll_dq_func_cntl_2 |= VCO_MODE;
mpll_dq_func_cntl_2  469 drivers/gpu/drm/radeon/rv770_dpm.c 			mpll_dq_func_cntl_2 &= ~VCO_MODE;
mpll_dq_func_cntl_2  476 drivers/gpu/drm/radeon/rv770_dpm.c 	mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
mpll_dq_func_cntl_2  925 drivers/gpu/drm/radeon/rv770_dpm.c 	u32 mpll_dq_func_cntl_2 =
mpll_dq_func_cntl_2  926 drivers/gpu/drm/radeon/rv770_dpm.c 		pi->clk_regs.rv770.mpll_dq_func_cntl_2;
mpll_dq_func_cntl_2  963 drivers/gpu/drm/radeon/rv770_dpm.c 	mpll_dq_func_cntl_2 |= BIAS_GEN_PDNB | RESET_EN;
mpll_dq_func_cntl_2  984 drivers/gpu/drm/radeon/rv770_dpm.c 	table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
mpll_dq_func_cntl_2 1037 drivers/gpu/drm/radeon/rv770_dpm.c 		cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl_2);
mpll_dq_func_cntl_2 1536 drivers/gpu/drm/radeon/rv770_dpm.c 	pi->clk_regs.rv770.mpll_dq_func_cntl_2 =
mpll_dq_func_cntl_2   38 drivers/gpu/drm/radeon/rv770_dpm.h 	u32 mpll_dq_func_cntl_2;