mpll_dq_func_cntl 4041 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL); mpll_dq_func_cntl 4848 drivers/gpu/drm/amd/amdgpu/si_dpm.c cpu_to_be32(si_pi->clock_registers.mpll_dq_func_cntl); mpll_dq_func_cntl 4964 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 mpll_dq_func_cntl = si_pi->clock_registers.mpll_dq_func_cntl; mpll_dq_func_cntl 5049 drivers/gpu/drm/amd/amdgpu/si_dpm.c cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 5347 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 mpll_dq_func_cntl = si_pi->clock_registers.mpll_dq_func_cntl; mpll_dq_func_cntl 5371 drivers/gpu/drm/amd/amdgpu/si_dpm.c mpll_dq_func_cntl &= ~(YCLK_SEL_MASK | YCLK_POST_DIV_MASK); mpll_dq_func_cntl 5372 drivers/gpu/drm/amd/amdgpu/si_dpm.c mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | mpll_dq_func_cntl 5415 drivers/gpu/drm/amd/amdgpu/si_dpm.c mclk->vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 359 drivers/gpu/drm/amd/amdgpu/si_dpm.h u32 mpll_dq_func_cntl; mpll_dq_func_cntl 503 drivers/gpu/drm/amd/amdgpu/si_dpm.h u32 mpll_dq_func_cntl; mpll_dq_func_cntl 915 drivers/gpu/drm/amd/amdgpu/si_dpm.h u32 mpll_dq_func_cntl; mpll_dq_func_cntl 1033 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL; mpll_dq_func_cntl 1061 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c mpll_dq_func_cntl = PHM_SET_FIELD(mpll_dq_func_cntl, mpll_dq_func_cntl 1063 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c mpll_dq_func_cntl = PHM_SET_FIELD(mpll_dq_func_cntl, mpll_dq_func_cntl 1108 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c mclk->MpllDqFuncCntl = mpll_dq_func_cntl; mpll_dq_func_cntl 1057 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL; mpll_dq_func_cntl 1089 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c mpll_dq_func_cntl = PHM_SET_FIELD(mpll_dq_func_cntl, mpll_dq_func_cntl 1091 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c mpll_dq_func_cntl = PHM_SET_FIELD(mpll_dq_func_cntl, mpll_dq_func_cntl 1160 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c mclk->MpllDqFuncCntl = mpll_dq_func_cntl; mpll_dq_func_cntl 800 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c uint32_t mpll_dq_func_cntl = data->clock_registers.vMPLL_DQ_FUNC_CNTL; mpll_dq_func_cntl 839 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mpll_dq_func_cntl = PHM_SET_FIELD(mpll_dq_func_cntl, mpll_dq_func_cntl 842 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mpll_dq_func_cntl = PHM_SET_FIELD(mpll_dq_func_cntl, mpll_dq_func_cntl 911 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c mclk->MpllDqFuncCntl = mpll_dq_func_cntl; mpll_dq_func_cntl 1889 drivers/gpu/drm/radeon/ci_dpm.c pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL); mpll_dq_func_cntl 2798 drivers/gpu/drm/radeon/ci_dpm.c u32 mpll_dq_func_cntl = pi->clock_registers.mpll_dq_func_cntl; mpll_dq_func_cntl 2822 drivers/gpu/drm/radeon/ci_dpm.c mpll_dq_func_cntl &= ~(YCLK_SEL_MASK | YCLK_POST_DIV_MASK); mpll_dq_func_cntl 2823 drivers/gpu/drm/radeon/ci_dpm.c mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | mpll_dq_func_cntl 2866 drivers/gpu/drm/radeon/ci_dpm.c mclk->MpllDqFuncCntl = mpll_dq_func_cntl; mpll_dq_func_cntl 3077 drivers/gpu/drm/radeon/ci_dpm.c cpu_to_be32(pi->clock_registers.mpll_dq_func_cntl); mpll_dq_func_cntl 137 drivers/gpu/drm/radeon/ci_dpm.h u32 mpll_dq_func_cntl; mpll_dq_func_cntl 485 drivers/gpu/drm/radeon/cypress_dpm.c u32 mpll_dq_func_cntl = mpll_dq_func_cntl 486 drivers/gpu/drm/radeon/cypress_dpm.c pi->clk_regs.rv770.mpll_dq_func_cntl; mpll_dq_func_cntl 532 drivers/gpu/drm/radeon/cypress_dpm.c mpll_dq_func_cntl &= ~(CLKR_MASK | mpll_dq_func_cntl 537 drivers/gpu/drm/radeon/cypress_dpm.c mpll_dq_func_cntl |= CLKR(dividers.ref_div); mpll_dq_func_cntl 538 drivers/gpu/drm/radeon/cypress_dpm.c mpll_dq_func_cntl |= YCLK_POST_DIV(dividers.post_div); mpll_dq_func_cntl 539 drivers/gpu/drm/radeon/cypress_dpm.c mpll_dq_func_cntl |= CLKF(dividers.whole_fb_div); mpll_dq_func_cntl 540 drivers/gpu/drm/radeon/cypress_dpm.c mpll_dq_func_cntl |= CLKFRAC(dividers.frac_fb_div); mpll_dq_func_cntl 541 drivers/gpu/drm/radeon/cypress_dpm.c mpll_dq_func_cntl |= IBIAS(ibias); mpll_dq_func_cntl 544 drivers/gpu/drm/radeon/cypress_dpm.c mpll_dq_func_cntl &= ~PDNB; mpll_dq_func_cntl 546 drivers/gpu/drm/radeon/cypress_dpm.c mpll_dq_func_cntl |= PDNB; mpll_dq_func_cntl 601 drivers/gpu/drm/radeon/cypress_dpm.c mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 1249 drivers/gpu/drm/radeon/cypress_dpm.c cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl); mpll_dq_func_cntl 1340 drivers/gpu/drm/radeon/cypress_dpm.c u32 mpll_dq_func_cntl = mpll_dq_func_cntl 1341 drivers/gpu/drm/radeon/cypress_dpm.c pi->clk_regs.rv770.mpll_dq_func_cntl; mpll_dq_func_cntl 1397 drivers/gpu/drm/radeon/cypress_dpm.c mpll_dq_func_cntl &= ~PDNB; mpll_dq_func_cntl 1439 drivers/gpu/drm/radeon/cypress_dpm.c cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 1193 drivers/gpu/drm/radeon/ni_dpm.c ni_pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL); mpll_dq_func_cntl 1697 drivers/gpu/drm/radeon/ni_dpm.c cpu_to_be32(ni_pi->clock_registers.mpll_dq_func_cntl); mpll_dq_func_cntl 1800 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_dq_func_cntl = ni_pi->clock_registers.mpll_dq_func_cntl; mpll_dq_func_cntl 1871 drivers/gpu/drm/radeon/ni_dpm.c mpll_dq_func_cntl &= ~PDNB; mpll_dq_func_cntl 1907 drivers/gpu/drm/radeon/ni_dpm.c table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 2171 drivers/gpu/drm/radeon/ni_dpm.c u32 mpll_dq_func_cntl = ni_pi->clock_registers.mpll_dq_func_cntl; mpll_dq_func_cntl 2214 drivers/gpu/drm/radeon/ni_dpm.c mpll_dq_func_cntl &= ~(CLKR_MASK | mpll_dq_func_cntl 2219 drivers/gpu/drm/radeon/ni_dpm.c mpll_dq_func_cntl |= CLKR(dividers.ref_div); mpll_dq_func_cntl 2220 drivers/gpu/drm/radeon/ni_dpm.c mpll_dq_func_cntl |= YCLK_POST_DIV(dividers.post_div); mpll_dq_func_cntl 2221 drivers/gpu/drm/radeon/ni_dpm.c mpll_dq_func_cntl |= CLKF(dividers.whole_fb_div); mpll_dq_func_cntl 2222 drivers/gpu/drm/radeon/ni_dpm.c mpll_dq_func_cntl |= CLKFRAC(dividers.frac_fb_div); mpll_dq_func_cntl 2223 drivers/gpu/drm/radeon/ni_dpm.c mpll_dq_func_cntl |= IBIAS(ibias); mpll_dq_func_cntl 2226 drivers/gpu/drm/radeon/ni_dpm.c mpll_dq_func_cntl &= ~PDNB; mpll_dq_func_cntl 2228 drivers/gpu/drm/radeon/ni_dpm.c mpll_dq_func_cntl |= PDNB; mpll_dq_func_cntl 2284 drivers/gpu/drm/radeon/ni_dpm.c mclk->vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 41 drivers/gpu/drm/radeon/ni_dpm.h u32 mpll_dq_func_cntl; mpll_dq_func_cntl 193 drivers/gpu/drm/radeon/rv740_dpm.c u32 mpll_dq_func_cntl = pi->clk_regs.rv770.mpll_dq_func_cntl; mpll_dq_func_cntl 228 drivers/gpu/drm/radeon/rv740_dpm.c mpll_dq_func_cntl &= ~(CLKR_MASK | mpll_dq_func_cntl 233 drivers/gpu/drm/radeon/rv740_dpm.c mpll_dq_func_cntl |= CLKR(dividers.ref_div); mpll_dq_func_cntl 234 drivers/gpu/drm/radeon/rv740_dpm.c mpll_dq_func_cntl |= YCLK_POST_DIV(dividers.post_div); mpll_dq_func_cntl 235 drivers/gpu/drm/radeon/rv740_dpm.c mpll_dq_func_cntl |= CLKF(dividers.whole_fb_div); mpll_dq_func_cntl 236 drivers/gpu/drm/radeon/rv740_dpm.c mpll_dq_func_cntl |= CLKFRAC(dividers.frac_fb_div); mpll_dq_func_cntl 237 drivers/gpu/drm/radeon/rv740_dpm.c mpll_dq_func_cntl |= IBIAS(ibias); mpll_dq_func_cntl 274 drivers/gpu/drm/radeon/rv740_dpm.c mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 303 drivers/gpu/drm/radeon/rv740_dpm.c pi->clk_regs.rv770.mpll_dq_func_cntl = mpll_dq_func_cntl 320 drivers/gpu/drm/radeon/rv740_dpm.c u32 mpll_dq_func_cntl = pi->clk_regs.rv770.mpll_dq_func_cntl; mpll_dq_func_cntl 375 drivers/gpu/drm/radeon/rv740_dpm.c table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 395 drivers/gpu/drm/radeon/rv770_dpm.c u32 mpll_dq_func_cntl = mpll_dq_func_cntl 396 drivers/gpu/drm/radeon/rv770_dpm.c pi->clk_regs.rv770.mpll_dq_func_cntl; mpll_dq_func_cntl 455 drivers/gpu/drm/radeon/rv770_dpm.c mpll_dq_func_cntl &= ~(CLKR_MASK | mpll_dq_func_cntl 460 drivers/gpu/drm/radeon/rv770_dpm.c mpll_dq_func_cntl |= CLKR(encoded_reference_dividers[dividers.ref_div - 1]); mpll_dq_func_cntl 461 drivers/gpu/drm/radeon/rv770_dpm.c mpll_dq_func_cntl |= YCLK_POST_DIV(postdiv_yclk); mpll_dq_func_cntl 462 drivers/gpu/drm/radeon/rv770_dpm.c mpll_dq_func_cntl |= CLKF(clkf); mpll_dq_func_cntl 463 drivers/gpu/drm/radeon/rv770_dpm.c mpll_dq_func_cntl |= CLKFRAC(clkfrac); mpll_dq_func_cntl 464 drivers/gpu/drm/radeon/rv770_dpm.c mpll_dq_func_cntl |= IBIAS(ibias); mpll_dq_func_cntl 475 drivers/gpu/drm/radeon/rv770_dpm.c mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 923 drivers/gpu/drm/radeon/rv770_dpm.c u32 mpll_dq_func_cntl = mpll_dq_func_cntl 924 drivers/gpu/drm/radeon/rv770_dpm.c pi->clk_regs.rv770.mpll_dq_func_cntl; mpll_dq_func_cntl 983 drivers/gpu/drm/radeon/rv770_dpm.c table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 1035 drivers/gpu/drm/radeon/rv770_dpm.c cpu_to_be32(pi->clk_regs.rv770.mpll_dq_func_cntl); mpll_dq_func_cntl 1534 drivers/gpu/drm/radeon/rv770_dpm.c pi->clk_regs.rv770.mpll_dq_func_cntl = mpll_dq_func_cntl 37 drivers/gpu/drm/radeon/rv770_dpm.h u32 mpll_dq_func_cntl; mpll_dq_func_cntl 3581 drivers/gpu/drm/radeon/si_dpm.c si_pi->clock_registers.mpll_dq_func_cntl = RREG32(MPLL_DQ_FUNC_CNTL); mpll_dq_func_cntl 4384 drivers/gpu/drm/radeon/si_dpm.c cpu_to_be32(si_pi->clock_registers.mpll_dq_func_cntl); mpll_dq_func_cntl 4502 drivers/gpu/drm/radeon/si_dpm.c u32 mpll_dq_func_cntl = si_pi->clock_registers.mpll_dq_func_cntl; mpll_dq_func_cntl 4586 drivers/gpu/drm/radeon/si_dpm.c cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 4885 drivers/gpu/drm/radeon/si_dpm.c u32 mpll_dq_func_cntl = si_pi->clock_registers.mpll_dq_func_cntl; mpll_dq_func_cntl 4909 drivers/gpu/drm/radeon/si_dpm.c mpll_dq_func_cntl &= ~(YCLK_SEL_MASK | YCLK_POST_DIV_MASK); mpll_dq_func_cntl 4910 drivers/gpu/drm/radeon/si_dpm.c mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | mpll_dq_func_cntl 4953 drivers/gpu/drm/radeon/si_dpm.c mclk->vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); mpll_dq_func_cntl 99 drivers/gpu/drm/radeon/si_dpm.h u32 mpll_dq_func_cntl;