mpidr             124 arch/arm/common/bL_switcher.c 	unsigned int mpidr = read_mpidr();
mpidr             125 arch/arm/common/bL_switcher.c 	unsigned int clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             149 arch/arm/common/bL_switcher.c 	unsigned int mpidr, this_cpu, that_cpu;
mpidr             236 arch/arm/common/bL_switcher.c 	mpidr = read_mpidr();
mpidr             237 arch/arm/common/bL_switcher.c 	pr_debug("after switch: CPU %d MPIDR %#x\n", this_cpu, mpidr);
mpidr             238 arch/arm/common/bL_switcher.c 	BUG_ON(mpidr != ib_mpidr);
mpidr             516 arch/arm/common/bL_switcher.c int bL_switcher_get_logical_index(u32 mpidr)
mpidr             523 arch/arm/common/bL_switcher.c 	mpidr &= MPIDR_HWID_BITMASK;
mpidr             528 arch/arm/common/bL_switcher.c 		if ((mpidr == cpu_logical_map(cpu)) ||
mpidr             529 arch/arm/common/bL_switcher.c 		    (mpidr == cpu_logical_map(pairing)))
mpidr             241 arch/arm/common/mcpm_entry.c 	unsigned int mpidr, cpu, cluster;
mpidr             245 arch/arm/common/mcpm_entry.c 	mpidr = read_cpuid_mpidr();
mpidr             246 arch/arm/common/mcpm_entry.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             247 arch/arm/common/mcpm_entry.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             330 arch/arm/common/mcpm_entry.c 		unsigned int mpidr = read_cpuid_mpidr();
mpidr             331 arch/arm/common/mcpm_entry.c 		unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             332 arch/arm/common/mcpm_entry.c 		unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); 
mpidr             342 arch/arm/common/mcpm_entry.c 	unsigned int mpidr, cpu, cluster;
mpidr             349 arch/arm/common/mcpm_entry.c 	mpidr = read_cpuid_mpidr();
mpidr             350 arch/arm/common/mcpm_entry.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             351 arch/arm/common/mcpm_entry.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             376 arch/arm/common/mcpm_entry.c 	unsigned int mpidr = read_cpuid_mpidr();
mpidr             377 arch/arm/common/mcpm_entry.c 	unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             378 arch/arm/common/mcpm_entry.c 	unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             426 arch/arm/common/mcpm_entry.c 	unsigned int i, j, mpidr, this_cluster;
mpidr             441 arch/arm/common/mcpm_entry.c 	mpidr = read_cpuid_mpidr();
mpidr             442 arch/arm/common/mcpm_entry.c 	this_cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr              22 arch/arm/common/mcpm_platsmp.c 	unsigned int mpidr;
mpidr              24 arch/arm/common/mcpm_platsmp.c 	mpidr = cpu_logical_map(cpu);
mpidr              25 arch/arm/common/mcpm_platsmp.c 	*pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr              26 arch/arm/common/mcpm_platsmp.c 	*pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr              73 arch/arm/common/mcpm_platsmp.c 	unsigned int mpidr, pcpu, pcluster;
mpidr              74 arch/arm/common/mcpm_platsmp.c 	mpidr = read_cpuid_mpidr();
mpidr              75 arch/arm/common/mcpm_platsmp.c 	pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr              76 arch/arm/common/mcpm_platsmp.c 	pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr              55 arch/arm/include/asm/bL_switcher.h int bL_switcher_get_logical_index(u32 mpidr);
mpidr              71 arch/arm/include/asm/bL_switcher.h static inline int bL_switcher_get_logical_index(u32 mpidr) { return -EUNATCH; }
mpidr              58 arch/arm/include/asm/cputype.h #define MPIDR_AFFINITY_LEVEL(mpidr, level) \
mpidr              59 arch/arm/include/asm/cputype.h 	((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)
mpidr             328 arch/arm/include/asm/kvm_host.h struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
mpidr              80 arch/arm/include/asm/smp_plat.h static inline int get_logical_index(u32 mpidr)
mpidr              84 arch/arm/include/asm/smp_plat.h 		if (cpu_logical_map(cpu) == mpidr)
mpidr              77 arch/arm/kernel/devtree.c 	u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
mpidr             141 arch/arm/kernel/devtree.c 		if (hwid == mpidr) {
mpidr             588 arch/arm/kernel/setup.c 	u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
mpidr             589 arch/arm/kernel/setup.c 	u32 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             602 arch/arm/kernel/setup.c 	pr_info("Booting Linux on physical CPU 0x%x\n", mpidr);
mpidr             197 arch/arm/kernel/topology.c 	unsigned int mpidr;
mpidr             202 arch/arm/kernel/topology.c 	mpidr = read_cpuid_mpidr();
mpidr             205 arch/arm/kernel/topology.c 	if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) {
mpidr             211 arch/arm/kernel/topology.c 		if (mpidr & MPIDR_MT_BITMASK) {
mpidr             213 arch/arm/kernel/topology.c 			cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             214 arch/arm/kernel/topology.c 			cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             215 arch/arm/kernel/topology.c 			cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 2);
mpidr             219 arch/arm/kernel/topology.c 			cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             220 arch/arm/kernel/topology.c 			cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             238 arch/arm/kernel/topology.c 		cpu_topology[cpuid].package_id, mpidr);
mpidr              53 arch/arm/mach-exynos/platsmp.c 	u32 mpidr = cpu_logical_map(cpu);
mpidr              54 arch/arm/mach-exynos/platsmp.c 	u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             324 arch/arm/mach-exynos/platsmp.c 	u32 mpidr = cpu_logical_map(cpu);
mpidr             325 arch/arm/mach-exynos/platsmp.c 	u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             429 arch/arm/mach-exynos/platsmp.c 	u32 mpidr = cpu_logical_map(cpu);
mpidr             430 arch/arm/mach-exynos/platsmp.c 	u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             267 arch/arm/mach-exynos/suspend.c 	unsigned int mpidr = read_cpuid_mpidr();
mpidr             268 arch/arm/mach-exynos/suspend.c 	unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             269 arch/arm/mach-exynos/suspend.c 	unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             453 arch/arm/mach-exynos/suspend.c 	unsigned int mpidr, cluster;
mpidr             455 arch/arm/mach-exynos/suspend.c 	mpidr = read_cpuid_mpidr();
mpidr             456 arch/arm/mach-exynos/suspend.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             100 arch/arm/mach-hisi/platmcpm.c 	unsigned int mpidr, cpu, cluster;
mpidr             104 arch/arm/mach-hisi/platmcpm.c 	mpidr = cpu_logical_map(l_cpu);
mpidr             105 arch/arm/mach-hisi/platmcpm.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             106 arch/arm/mach-hisi/platmcpm.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             155 arch/arm/mach-hisi/platmcpm.c 	unsigned int mpidr, cpu, cluster;
mpidr             158 arch/arm/mach-hisi/platmcpm.c 	mpidr = cpu_logical_map(l_cpu);
mpidr             159 arch/arm/mach-hisi/platmcpm.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             160 arch/arm/mach-hisi/platmcpm.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             193 arch/arm/mach-hisi/platmcpm.c 	unsigned int mpidr, cpu, cluster;
mpidr             196 arch/arm/mach-hisi/platmcpm.c 	mpidr = cpu_logical_map(l_cpu);
mpidr             197 arch/arm/mach-hisi/platmcpm.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             198 arch/arm/mach-hisi/platmcpm.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             249 arch/arm/mach-hisi/platmcpm.c 	unsigned int mpidr, cpu, cluster;
mpidr             251 arch/arm/mach-hisi/platmcpm.c 	mpidr = read_cpuid_mpidr();
mpidr             252 arch/arm/mach-hisi/platmcpm.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             253 arch/arm/mach-hisi/platmcpm.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr              25 arch/arm/mach-milbeaut/platsmp.c 	unsigned int mpidr, cpu, cluster;
mpidr              30 arch/arm/mach-milbeaut/platsmp.c 	mpidr = cpu_logical_map(l_cpu);
mpidr              31 arch/arm/mach-milbeaut/platsmp.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr              32 arch/arm/mach-milbeaut/platsmp.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr              48 arch/arm/mach-milbeaut/platsmp.c 	unsigned int mpidr, cpu, cluster;
mpidr              59 arch/arm/mach-milbeaut/platsmp.c 	mpidr = read_cpuid_mpidr();
mpidr              60 arch/arm/mach-milbeaut/platsmp.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr              61 arch/arm/mach-milbeaut/platsmp.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr              78 arch/arm/mach-milbeaut/platsmp.c 	unsigned int mpidr, cpu;
mpidr              80 arch/arm/mach-milbeaut/platsmp.c 	mpidr = cpu_logical_map(l_cpu);
mpidr              81 arch/arm/mach-milbeaut/platsmp.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             394 arch/arm/mach-sunxi/mc_smp.c 	unsigned int mpidr, cpu, cluster;
mpidr             396 arch/arm/mach-sunxi/mc_smp.c 	mpidr = cpu_logical_map(l_cpu);
mpidr             397 arch/arm/mach-sunxi/mc_smp.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             398 arch/arm/mach-sunxi/mc_smp.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             446 arch/arm/mach-sunxi/mc_smp.c 	unsigned int mpidr, cpu, cluster;
mpidr             449 arch/arm/mach-sunxi/mc_smp.c 	mpidr = cpu_logical_map(l_cpu);
mpidr             450 arch/arm/mach-sunxi/mc_smp.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             451 arch/arm/mach-sunxi/mc_smp.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             536 arch/arm/mach-sunxi/mc_smp.c 	unsigned int mpidr, cpu, cluster;
mpidr             541 arch/arm/mach-sunxi/mc_smp.c 	mpidr = cpu_logical_map(l_cpu);
mpidr             542 arch/arm/mach-sunxi/mc_smp.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             543 arch/arm/mach-sunxi/mc_smp.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             631 arch/arm/mach-sunxi/mc_smp.c 	unsigned int mpidr, cpu, cluster;
mpidr             633 arch/arm/mach-sunxi/mc_smp.c 	mpidr = read_cpuid_mpidr();
mpidr             634 arch/arm/mach-sunxi/mc_smp.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             635 arch/arm/mach-sunxi/mc_smp.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             204 arch/arm/mach-vexpress/tc2_pm.c 	unsigned int mpidr, cpu, cluster;
mpidr             244 arch/arm/mach-vexpress/tc2_pm.c 	mpidr = read_cpuid_mpidr();
mpidr             245 arch/arm/mach-vexpress/tc2_pm.c 	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             246 arch/arm/mach-vexpress/tc2_pm.c 	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr              21 arch/arm64/include/asm/cputype.h #define MPIDR_AFFINITY_LEVEL(mpidr, level) \
mpidr              22 arch/arm64/include/asm/cputype.h 	((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)
mpidr             485 arch/arm64/include/asm/kvm_host.h struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
mpidr              34 arch/arm64/include/asm/smp_plat.h static inline int get_logical_index(u64 mpidr)
mpidr              38 arch/arm64/include/asm/smp_plat.h 		if (cpu_logical_map(cpu) == mpidr)
mpidr              87 arch/arm64/kernel/setup.c 	u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
mpidr              88 arch/arm64/kernel/setup.c 	cpu_logical_map(0) = mpidr;
mpidr              97 arch/arm64/kernel/setup.c 		(unsigned long)mpidr, read_cpuid_id());
mpidr             195 arch/arm64/kernel/smp.c 	u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
mpidr             250 arch/arm64/kernel/smp.c 					 cpu, (unsigned long)mpidr,
mpidr              27 arch/arm64/kernel/topology.c 	u64 mpidr;
mpidr              32 arch/arm64/kernel/topology.c 	mpidr = read_cpuid_mpidr();
mpidr              35 arch/arm64/kernel/topology.c 	if (mpidr & MPIDR_UP_BITMASK)
mpidr              39 arch/arm64/kernel/topology.c 	if (mpidr & MPIDR_MT_BITMASK) {
mpidr              41 arch/arm64/kernel/topology.c 		cpuid_topo->thread_id  = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr              42 arch/arm64/kernel/topology.c 		cpuid_topo->core_id    = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr              43 arch/arm64/kernel/topology.c 		cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 2) |
mpidr              44 arch/arm64/kernel/topology.c 					 MPIDR_AFFINITY_LEVEL(mpidr, 3) << 8;
mpidr              48 arch/arm64/kernel/topology.c 		cpuid_topo->core_id    = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr              49 arch/arm64/kernel/topology.c 		cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1) |
mpidr              50 arch/arm64/kernel/topology.c 					 MPIDR_AFFINITY_LEVEL(mpidr, 2) << 8 |
mpidr              51 arch/arm64/kernel/topology.c 					 MPIDR_AFFINITY_LEVEL(mpidr, 3) << 16;
mpidr              56 arch/arm64/kernel/topology.c 		 cpuid_topo->thread_id, mpidr);
mpidr             609 arch/arm64/kvm/sys_regs.c 	u64 mpidr;
mpidr             618 arch/arm64/kvm/sys_regs.c 	mpidr = (vcpu->vcpu_id & 0x0f) << MPIDR_LEVEL_SHIFT(0);
mpidr             619 arch/arm64/kvm/sys_regs.c 	mpidr |= ((vcpu->vcpu_id >> 4) & 0xff) << MPIDR_LEVEL_SHIFT(1);
mpidr             620 arch/arm64/kvm/sys_regs.c 	mpidr |= ((vcpu->vcpu_id >> 12) & 0xff) << MPIDR_LEVEL_SHIFT(2);
mpidr             621 arch/arm64/kvm/sys_regs.c 	vcpu_write_sys_reg(vcpu, (1ULL << 31) | mpidr, MPIDR_EL1);
mpidr              91 drivers/acpi/processor_core.c 		int device_declaration, u32 acpi_id, phys_cpuid_t *mpidr)
mpidr             105 drivers/acpi/processor_core.c 		*mpidr = gicc->arm_mpidr;
mpidr             117 drivers/bus/arm-cci.c 	u64 mpidr;
mpidr             132 drivers/bus/arm-cci.c static inline void init_cpu_port(struct cpu_port *port, u32 index, u64 mpidr)
mpidr             135 drivers/bus/arm-cci.c 	port->mpidr = mpidr;
mpidr             143 drivers/bus/arm-cci.c static inline bool cpu_port_match(struct cpu_port *port, u64 mpidr)
mpidr             145 drivers/bus/arm-cci.c 	return port->mpidr == (mpidr & MPIDR_HWID_BITMASK);
mpidr             265 drivers/bus/arm-cci.c int notrace cci_disable_port_by_cpu(u64 mpidr)
mpidr             271 drivers/bus/arm-cci.c 		if (is_valid && cpu_port_match(&cpu_port[cpu], mpidr)) {
mpidr             366 drivers/bus/arm-cci.c 	[offsetof_cpu_port_mpidr_lsb] "i" (offsetof(struct cpu_port, mpidr)),
mpidr             368 drivers/bus/arm-cci.c 	[offsetof_cpu_port_mpidr_lsb] "i" (offsetof(struct cpu_port, mpidr)+4),
mpidr             103 drivers/cpuidle/cpuidle-big_little.c 	unsigned int mpidr = read_cpuid_mpidr();
mpidr             104 drivers/cpuidle/cpuidle-big_little.c 	unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             105 drivers/cpuidle/cpuidle-big_little.c 	unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             260 drivers/firmware/efi/cper-arm.c 			pfx, proc->mpidr);
mpidr              96 drivers/irqchip/irq-gic-v3.c #define MPIDR_RS(mpidr)			(((mpidr) & 0xF0UL) >> 4)
mpidr             572 drivers/irqchip/irq-gic-v3.c static u64 gic_mpidr_to_affinity(unsigned long mpidr)
mpidr             576 drivers/irqchip/irq-gic-v3.c 	aff = ((u64)MPIDR_AFFINITY_LEVEL(mpidr, 3) << 32 |
mpidr             577 drivers/irqchip/irq-gic-v3.c 	       MPIDR_AFFINITY_LEVEL(mpidr, 2) << 16 |
mpidr             578 drivers/irqchip/irq-gic-v3.c 	       MPIDR_AFFINITY_LEVEL(mpidr, 1) << 8  |
mpidr             579 drivers/irqchip/irq-gic-v3.c 	       MPIDR_AFFINITY_LEVEL(mpidr, 0));
mpidr             806 drivers/irqchip/irq-gic-v3.c 	unsigned long mpidr = cpu_logical_map(smp_processor_id());
mpidr             814 drivers/irqchip/irq-gic-v3.c 	aff = (MPIDR_AFFINITY_LEVEL(mpidr, 3) << 24 |
mpidr             815 drivers/irqchip/irq-gic-v3.c 	       MPIDR_AFFINITY_LEVEL(mpidr, 2) << 16 |
mpidr             816 drivers/irqchip/irq-gic-v3.c 	       MPIDR_AFFINITY_LEVEL(mpidr, 1) << 8 |
mpidr             817 drivers/irqchip/irq-gic-v3.c 	       MPIDR_AFFINITY_LEVEL(mpidr, 0));
mpidr             826 drivers/irqchip/irq-gic-v3.c 			smp_processor_id(), mpidr,
mpidr             880 drivers/irqchip/irq-gic-v3.c 	u64 mpidr = cpu_logical_map(cpu);
mpidr             881 drivers/irqchip/irq-gic-v3.c 	u64 need_rss = MPIDR_RS(mpidr);
mpidr             976 drivers/irqchip/irq-gic-v3.c 				cpu, (unsigned long)mpidr,
mpidr            1036 drivers/irqchip/irq-gic-v3.c #define MPIDR_TO_SGI_RS(mpidr)	(MPIDR_RS(mpidr) << ICC_SGI1R_RS_SHIFT)
mpidr            1037 drivers/irqchip/irq-gic-v3.c #define MPIDR_TO_SGI_CLUSTER_ID(mpidr)	((mpidr) & ~0xFUL)
mpidr            1053 drivers/irqchip/irq-gic-v3.c 	unsigned long mpidr = cpu_logical_map(cpu);
mpidr            1057 drivers/irqchip/irq-gic-v3.c 		tlist |= 1 << (mpidr & 0xf);
mpidr            1064 drivers/irqchip/irq-gic-v3.c 		mpidr = cpu_logical_map(cpu);
mpidr            1066 drivers/irqchip/irq-gic-v3.c 		if (cluster_id != MPIDR_TO_SGI_CLUSTER_ID(mpidr)) {
mpidr            1115 drivers/irqchip/irq-gic.c 			u32 mpidr = cpu_logical_map(cpu);
mpidr            1116 drivers/irqchip/irq-gic.c 			u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
mpidr             347 drivers/perf/hisilicon/hisi_uncore_pmu.c 	u64 mpidr = read_cpuid_mpidr();
mpidr             349 drivers/perf/hisilicon/hisi_uncore_pmu.c 	if (mpidr & MPIDR_MT_BITMASK) {
mpidr             350 drivers/perf/hisilicon/hisi_uncore_pmu.c 		int aff2 = MPIDR_AFFINITY_LEVEL(mpidr, 2);
mpidr             358 drivers/perf/hisilicon/hisi_uncore_pmu.c 			*sccl_id = MPIDR_AFFINITY_LEVEL(mpidr, 2);
mpidr             360 drivers/perf/hisilicon/hisi_uncore_pmu.c 			*ccl_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             782 drivers/perf/qcom_l2_pmu.c 	u64 mpidr;
mpidr             791 drivers/perf/qcom_l2_pmu.c 	mpidr = read_cpuid_mpidr();
mpidr             792 drivers/perf/qcom_l2_pmu.c 	if (mpidr & MPIDR_MT_BITMASK)
mpidr             793 drivers/perf/qcom_l2_pmu.c 		cpu_cluster_id = MPIDR_AFFINITY_LEVEL(mpidr, 2);
mpidr             795 drivers/perf/qcom_l2_pmu.c 		cpu_cluster_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
mpidr             120 include/kvm/arm_vgic.h 		u32 mpidr;			/* GICv3 target VCPU */
mpidr              26 include/linux/arm-cci.h extern int cci_disable_port_by_cpu(u64 mpidr);
mpidr              34 include/linux/arm-cci.h static inline int cci_disable_port_by_cpu(u64 mpidr) { return -ENODEV; }
mpidr             400 include/linux/cper.h 	u64	mpidr;
mpidr             178 include/ras/ras_event.h 		__field(u64, mpidr)
mpidr             191 include/ras/ras_event.h 			__entry->mpidr = proc->mpidr;
mpidr             193 include/ras/ras_event.h 			__entry->mpidr = 0ULL;
mpidr             206 include/ras/ras_event.h 		  __entry->affinity, __entry->mpidr, __entry->midr,
mpidr            1629 virt/kvm/arm/arm.c struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr)
mpidr            1634 virt/kvm/arm/arm.c 	mpidr &= MPIDR_HWID_BITMASK;
mpidr            1636 virt/kvm/arm/arm.c 		if (mpidr == kvm_vcpu_get_mpidr_aff(vcpu))
mpidr             151 virt/kvm/arm/psci.c 	unsigned long mpidr;
mpidr             174 virt/kvm/arm/psci.c 		mpidr = kvm_vcpu_get_mpidr_aff(tmp);
mpidr             175 virt/kvm/arm/psci.c 		if ((mpidr & target_affinity_mask) == target_affinity) {
mpidr             212 virt/kvm/arm/vgic/vgic-debug.c 			irq->mpidr,
mpidr             175 virt/kvm/arm/vgic/vgic-init.c 			irq->mpidr = 0;
mpidr             293 virt/kvm/arm/vgic/vgic-init.c 				irq->mpidr = kvm_vcpu_get_mpidr_aff(vcpu);
mpidr             141 virt/kvm/arm/vgic/vgic-mmio-v3.c 		ret = extract_bytes(READ_ONCE(irq->mpidr), addr & 7, len);
mpidr             167 virt/kvm/arm/vgic/vgic-mmio-v3.c 	irq->mpidr = val & GENMASK(23, 0);
mpidr             168 virt/kvm/arm/vgic/vgic-mmio-v3.c 	irq->target_vcpu = kvm_mpidr_to_vcpu(vcpu->kvm, irq->mpidr);
mpidr             207 virt/kvm/arm/vgic/vgic-mmio-v3.c 	unsigned long mpidr = kvm_vcpu_get_mpidr_aff(vcpu);
mpidr             215 virt/kvm/arm/vgic/vgic-mmio-v3.c 	value = (u64)(mpidr & GENMASK(23, 0)) << 32;
mpidr             891 virt/kvm/arm/vgic/vgic-mmio-v3.c 	u64 mpidr;
mpidr             900 virt/kvm/arm/vgic/vgic-mmio-v3.c 	mpidr = SGI_AFFINITY_LEVEL(reg, 3);
mpidr             901 virt/kvm/arm/vgic/vgic-mmio-v3.c 	mpidr |= SGI_AFFINITY_LEVEL(reg, 2);
mpidr             902 virt/kvm/arm/vgic/vgic-mmio-v3.c 	mpidr |= SGI_AFFINITY_LEVEL(reg, 1);
mpidr             924 virt/kvm/arm/vgic/vgic-mmio-v3.c 			level0 = match_mpidr(mpidr, target_cpus, c_vcpu);