mp1                21 arch/arm/include/asm/tls.h 	ldr	\tmp1, =elf_hwcap
mp1                22 arch/arm/include/asm/tls.h 	ldr	\tmp1, [\tmp1, #0]
mp1                24 arch/arm/include/asm/tls.h 	tst	\tmp1, #HWCAP_TLS		@ hardware TLS available?
mp1                33 arch/arm/include/asm/tls.h 	mov	\tmp1, #0xffff0fff
mp1                34 arch/arm/include/asm/tls.h 	str	\tp, [\tmp1, #-15]		@ set TLS value at 0xffff0ff0
mp1                87 arch/arm/include/asm/uaccess-asm.h 	ldr	\tmp1, [\tsk, #TI_ADDR_LIMIT]
mp1                92 arch/arm/include/asm/uaccess-asm.h 	str	\tmp1, [sp, #SVC_ADDR_LIMIT]
mp1               109 arch/arm/include/asm/uaccess-asm.h 	ldr	\tmp1, [sp, #SVC_ADDR_LIMIT]
mp1               111 arch/arm/include/asm/uaccess-asm.h 	str	\tmp1, [\tsk, #TI_ADDR_LIMIT]
mp1                82 arch/arm/mach-tegra/sleep.h 	mrc	p15, 0, \tmp1, c0, c0, 0
mp1                83 arch/arm/mach-tegra/sleep.h 	ubfx	\tmp1, \tmp1, #4, #12
mp1                85 arch/arm/mach-tegra/sleep.h 	cmp	\tmp1, \tmp2
mp1                90 arch/arm/mach-tegra/sleep.h 	mrc	p15, 0, \tmp1, c1, c0, 1	@ ACTLR
mp1                91 arch/arm/mach-tegra/sleep.h 	bic	\tmp1, \tmp1, #(1<<6) | (1<<0)	@ clear ACTLR.SMP | ACTLR.FW
mp1                92 arch/arm/mach-tegra/sleep.h 	mcr	p15, 0, \tmp1, c1, c0, 1	@ ACTLR
mp1                95 arch/arm/mach-tegra/sleep.h 	check_cpu_part_num 0xc09, \tmp1, \tmp2
mp1                96 arch/arm/mach-tegra/sleep.h 	mrceq	p15, 0, \tmp1, c0, c0, 5
mp1                97 arch/arm/mach-tegra/sleep.h 	andeq	\tmp1, \tmp1, #0xF
mp1                98 arch/arm/mach-tegra/sleep.h 	moveq	\tmp1, \tmp1, lsl #2
mp1               100 arch/arm/mach-tegra/sleep.h 	moveq	\tmp2, \tmp2, lsl \tmp1
mp1               101 arch/arm/mach-tegra/sleep.h 	ldreq	\tmp1, =(TEGRA_ARM_PERIF_VIRT + 0xC)
mp1               102 arch/arm/mach-tegra/sleep.h 	streq	\tmp2, [\tmp1]			@ invalidate SCU tags for CPU
mp1               110 arch/arm/mach-tegra/sleep.h 	mov32	\tmp1, \base
mp1               111 arch/arm/mach-tegra/sleep.h 	ldr	\tmp1, [\tmp1, #APB_MISC_GP_HIDREV]
mp1               112 arch/arm/mach-tegra/sleep.h 	and	\tmp1, \tmp1, #0xff00
mp1               113 arch/arm/mach-tegra/sleep.h 	mov	\tmp1, \tmp1, lsr #8
mp1                16 arch/arm64/include/asm/asm-uaccess.h 	mrs	\tmp1, ttbr1_el1			// swapper_pg_dir
mp1                17 arch/arm64/include/asm/asm-uaccess.h 	bic	\tmp1, \tmp1, #TTBR_ASID_MASK
mp1                18 arch/arm64/include/asm/asm-uaccess.h 	sub	\tmp1, \tmp1, #RESERVED_TTBR0_SIZE	// reserved_ttbr0 just before swapper_pg_dir
mp1                19 arch/arm64/include/asm/asm-uaccess.h 	msr	ttbr0_el1, \tmp1			// set reserved TTBR0_EL1
mp1                21 arch/arm64/include/asm/asm-uaccess.h 	add	\tmp1, \tmp1, #RESERVED_TTBR0_SIZE
mp1                22 arch/arm64/include/asm/asm-uaccess.h 	msr	ttbr1_el1, \tmp1		// set reserved ASID
mp1                27 arch/arm64/include/asm/asm-uaccess.h 	get_current_task \tmp1
mp1                28 arch/arm64/include/asm/asm-uaccess.h 	ldr	\tmp1, [\tmp1, #TSK_TI_TTBR0]	// load saved TTBR0_EL1
mp1                30 arch/arm64/include/asm/asm-uaccess.h 	extr    \tmp2, \tmp2, \tmp1, #48
mp1                34 arch/arm64/include/asm/asm-uaccess.h 	msr	ttbr0_el1, \tmp1		// set the non-PAN TTBR0_EL1
mp1                41 arch/arm64/include/asm/asm-uaccess.h 	__uaccess_ttbr0_disable \tmp1
mp1                49 arch/arm64/include/asm/asm-uaccess.h 	__uaccess_ttbr0_enable \tmp1, \tmp2
mp1               360 arch/arm64/include/asm/assembler.h 	mov	\tmp1, #ID_AA64MMFR0_PARANGE_MAX
mp1               361 arch/arm64/include/asm/assembler.h 	cmp	\tmp0, \tmp1
mp1               362 arch/arm64/include/asm/assembler.h 	csel	\tmp0, \tmp1, \tmp0, hi
mp1               385 arch/arm64/include/asm/assembler.h 	dcache_line_size \tmp1, \tmp2
mp1               387 arch/arm64/include/asm/assembler.h 	sub	\tmp2, \tmp1, #1
mp1               407 arch/arm64/include/asm/assembler.h 	add	\kaddr, \kaddr, \tmp1
mp1               422 arch/arm64/include/asm/assembler.h 	icache_line_size \tmp1, \tmp2
mp1               423 arch/arm64/include/asm/assembler.h 	sub	\tmp2, \tmp1, #1
mp1               427 arch/arm64/include/asm/assembler.h 	add	\tmp2, \tmp2, \tmp1
mp1               602 arch/arm64/include/asm/assembler.h 	mrs	\tmp1, midr_el1
mp1               605 arch/arm64/include/asm/assembler.h 	and	\tmp1, \tmp1, \tmp2
mp1               607 arch/arm64/include/asm/assembler.h 	cmp	\tmp1, \tmp2
mp1              2553 drivers/scsi/lpfc/lpfc_init.c 	struct lpfc_dmabuf *mp1, *mp2;
mp1              2569 drivers/scsi/lpfc/lpfc_init.c 		mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
mp1              2570 drivers/scsi/lpfc/lpfc_init.c 		if (mp1)
mp1              2571 drivers/scsi/lpfc/lpfc_init.c 		    mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
mp1              2572 drivers/scsi/lpfc/lpfc_init.c 		if (!mp1 || !mp1->virt) {
mp1              2573 drivers/scsi/lpfc/lpfc_init.c 			kfree(mp1);
mp1              2579 drivers/scsi/lpfc/lpfc_init.c 		INIT_LIST_HEAD(&mp1->list);
mp1              2588 drivers/scsi/lpfc/lpfc_init.c 				lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
mp1              2589 drivers/scsi/lpfc/lpfc_init.c 				kfree(mp1);
mp1              2600 drivers/scsi/lpfc/lpfc_init.c 		icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
mp1              2601 drivers/scsi/lpfc/lpfc_init.c 		icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
mp1              2618 drivers/scsi/lpfc/lpfc_init.c 			lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
mp1              2619 drivers/scsi/lpfc/lpfc_init.c 			kfree(mp1);
mp1              2630 drivers/scsi/lpfc/lpfc_init.c 		lpfc_sli_ringpostbuf_put(phba, pring, mp1);