mout_top0_cc_pll_half_p 240 drivers/clk/samsung/clk-exynos7.c PNAME(mout_top0_cc_pll_half_p) = {"mout_top0_cc_pll_user", mout_top0_cc_pll_half_p 288 drivers/clk/samsung/clk-exynos7.c MUX(0, "mout_top0_cc_pll_half", mout_top0_cc_pll_half_p,