mode_set 89 arch/arm/mach-rockchip/pm.c u32 mode_set, mode_set1; mode_set 117 arch/arm/mach-rockchip/pm.c mode_set = BIT(PMU_GLOBAL_INT_DISABLE) | BIT(PMU_L2FLUSH_EN) | mode_set 127 arch/arm/mach-rockchip/pm.c mode_set |= BIT(PMU_BUS_PD_EN) | BIT(PMU_PMU_USE_LF) | mode_set 132 arch/arm/mach-rockchip/pm.c mode_set |= BIT(PMU_OSC_24M_DIS); mode_set 158 arch/arm/mach-rockchip/pm.c mode_set |= BIT(PMU_CLK_CORE_SRC_GATE_EN); mode_set 170 arch/arm/mach-rockchip/pm.c regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON, mode_set); mode_set 2664 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c .mode_set = dce_v10_0_crtc_mode_set, mode_set 3421 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c .mode_set = dce_v10_0_ext_mode_set, mode_set 3431 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c .mode_set = dce_v10_0_encoder_mode_set, mode_set 3441 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c .mode_set = dce_v10_0_encoder_mode_set, mode_set 2772 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c .mode_set = dce_v11_0_crtc_mode_set, mode_set 3547 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c .mode_set = dce_v11_0_ext_mode_set, mode_set 3557 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c .mode_set = dce_v11_0_encoder_mode_set, mode_set 3567 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c .mode_set = dce_v11_0_encoder_mode_set, mode_set 2552 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c .mode_set = dce_v6_0_crtc_mode_set, mode_set 3231 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c .mode_set = dce_v6_0_ext_mode_set, mode_set 3241 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c .mode_set = dce_v6_0_encoder_mode_set, mode_set 3251 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c .mode_set = dce_v6_0_encoder_mode_set, mode_set 2572 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c .mode_set = dce_v8_0_crtc_mode_set, mode_set 3309 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c .mode_set = dce_v8_0_ext_mode_set, mode_set 3319 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c .mode_set = dce_v8_0_encoder_mode_set, mode_set 3329 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c .mode_set = dce_v8_0_encoder_mode_set, mode_set 215 drivers/gpu/drm/amd/amdgpu/dce_virtual.c .mode_set = dce_virtual_crtc_mode_set, mode_set 570 drivers/gpu/drm/amd/amdgpu/dce_virtual.c .mode_set = dce_virtual_encoder_mode_set, mode_set 632 drivers/gpu/drm/ast/ast_mode.c .mode_set = ast_crtc_mode_set, mode_set 731 drivers/gpu/drm/ast/ast_mode.c .mode_set = ast_encoder_mode_set, mode_set 890 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c .mode_set = adv7511_bridge_mode_set, mode_set 1125 drivers/gpu/drm/bridge/analogix-anx78xx.c .mode_set = anx78xx_bridge_mode_set, mode_set 1569 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c .mode_set = analogix_dp_bridge_mode_set, mode_set 434 drivers/gpu/drm/bridge/sii902x.c .mode_set = sii902x_bridge_mode_set, mode_set 2346 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c .mode_set = dw_hdmi_bridge_mode_set, mode_set 943 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c .mode_set = dw_mipi_dsi_bridge_mode_set, mode_set 1427 drivers/gpu/drm/bridge/tc358767.c .mode_set = tc_bridge_mode_set, mode_set 1224 drivers/gpu/drm/drm_atomic_helper.c } else if (funcs && funcs->mode_set) { mode_set 1225 drivers/gpu/drm/drm_atomic_helper.c funcs->mode_set(encoder, mode, adjusted_mode); mode_set 303 drivers/gpu/drm/drm_bridge.c if (bridge->funcs->mode_set) mode_set 304 drivers/gpu/drm/drm_bridge.c bridge->funcs->mode_set(bridge, mode, adjusted_mode); mode_set 904 drivers/gpu/drm/drm_client_modeset.c struct drm_mode_set *mode_set; mode_set 937 drivers/gpu/drm/drm_client_modeset.c drm_client_for_each_modeset(mode_set, client) { mode_set 938 drivers/gpu/drm/drm_client_modeset.c struct drm_plane *primary = mode_set->crtc->primary; mode_set 941 drivers/gpu/drm/drm_client_modeset.c if (drm_client_rotation(mode_set, &rotation)) { mode_set 949 drivers/gpu/drm/drm_client_modeset.c ret = __drm_atomic_helper_set_config(mode_set, state); mode_set 958 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc *crtc = mode_set->crtc; mode_set 988 drivers/gpu/drm/drm_client_modeset.c struct drm_mode_set *mode_set; mode_set 1003 drivers/gpu/drm/drm_client_modeset.c drm_client_for_each_modeset(mode_set, client) { mode_set 1004 drivers/gpu/drm/drm_client_modeset.c struct drm_crtc *crtc = mode_set->crtc; mode_set 1016 drivers/gpu/drm/drm_client_modeset.c ret = drm_mode_set_config_internal(mode_set); mode_set 368 drivers/gpu/drm/drm_crtc_helper.c ret = !crtc_funcs->mode_set(crtc, mode, adjusted_mode, x, y, old_fb); mode_set 383 drivers/gpu/drm/drm_crtc_helper.c if (encoder_funcs->mode_set) mode_set 384 drivers/gpu/drm/drm_crtc_helper.c encoder_funcs->mode_set(encoder, mode, adjusted_mode); mode_set 166 drivers/gpu/drm/drm_encoder_slave.c get_slave_funcs(encoder)->mode_set(encoder, mode, adjusted_mode); mode_set 156 drivers/gpu/drm/drm_fb_helper.c struct drm_mode_set *mode_set; mode_set 160 drivers/gpu/drm/drm_fb_helper.c drm_client_for_each_modeset(mode_set, &helper->client) { mode_set 161 drivers/gpu/drm/drm_fb_helper.c if (!mode_set->crtc->enabled) mode_set 164 drivers/gpu/drm/drm_fb_helper.c funcs = mode_set->crtc->helper_private; mode_set 168 drivers/gpu/drm/drm_fb_helper.c if (drm_drv_uses_atomic_modeset(mode_set->crtc->dev)) mode_set 171 drivers/gpu/drm/drm_fb_helper.c funcs->mode_set_base_atomic(mode_set->crtc, mode_set 172 drivers/gpu/drm/drm_fb_helper.c mode_set->fb, mode_set 173 drivers/gpu/drm/drm_fb_helper.c mode_set->x, mode_set 174 drivers/gpu/drm/drm_fb_helper.c mode_set->y, mode_set 194 drivers/gpu/drm/drm_fb_helper.c struct drm_mode_set *mode_set; mode_set 198 drivers/gpu/drm/drm_fb_helper.c drm_client_for_each_modeset(mode_set, client) { mode_set 199 drivers/gpu/drm/drm_fb_helper.c crtc = mode_set->crtc; mode_set 217 drivers/gpu/drm/drm_fb_helper.c drm_fb_helper_restore_lut_atomic(mode_set->crtc); mode_set 218 drivers/gpu/drm/drm_fb_helper.c funcs->mode_set_base_atomic(mode_set->crtc, fb, crtc->x, mode_set 1395 drivers/gpu/drm/drm_fb_helper.c struct drm_mode_set *mode_set; mode_set 1398 drivers/gpu/drm/drm_fb_helper.c drm_client_for_each_modeset(mode_set, &fb_helper->client) { mode_set 1399 drivers/gpu/drm/drm_fb_helper.c mode_set->x = x; mode_set 1400 drivers/gpu/drm/drm_fb_helper.c mode_set->y = y; mode_set 1498 drivers/gpu/drm/drm_fb_helper.c struct drm_mode_set *mode_set; mode_set 1551 drivers/gpu/drm/drm_fb_helper.c drm_client_for_each_modeset(mode_set, client) { mode_set 1552 drivers/gpu/drm/drm_fb_helper.c struct drm_crtc *crtc = mode_set->crtc; mode_set 1596 drivers/gpu/drm/drm_fb_helper.c drm_client_for_each_modeset(mode_set, client) { mode_set 1605 drivers/gpu/drm/drm_fb_helper.c desired_mode = mode_set->mode; mode_set 1612 drivers/gpu/drm/drm_fb_helper.c x = mode_set->x; mode_set 1613 drivers/gpu/drm/drm_fb_helper.c y = mode_set->y; mode_set 1618 drivers/gpu/drm/drm_fb_helper.c for (j = 0; j < mode_set->num_connectors; j++) { mode_set 1619 drivers/gpu/drm/drm_fb_helper.c struct drm_connector *connector = mode_set->connectors[j]; mode_set 132 drivers/gpu/drm/exynos/exynos_dp.c .mode_set = exynos_dp_mode_set, mode_set 147 drivers/gpu/drm/exynos/exynos_drm_dpi.c .mode_set = exynos_dpi_mode_set, mode_set 303 drivers/gpu/drm/exynos/exynos_drm_mic.c .mode_set = mic_mode_set, mode_set 367 drivers/gpu/drm/exynos/exynos_drm_vidi.c .mode_set = exynos_vidi_mode_set, mode_set 222 drivers/gpu/drm/gma500/cdv_intel_crt.c .mode_set = cdv_intel_crt_mode_set, mode_set 967 drivers/gpu/drm/gma500/cdv_intel_display.c .mode_set = cdv_intel_crtc_mode_set, mode_set 1923 drivers/gpu/drm/gma500/cdv_intel_dp.c .mode_set = cdv_intel_dp_mode_set, mode_set 201 drivers/gpu/drm/gma500/cdv_intel_hdmi.c helpers->mode_set(encoder, &crtc->saved_mode, mode_set 259 drivers/gpu/drm/gma500/cdv_intel_hdmi.c .mode_set = cdv_hdmi_mode_set, mode_set 484 drivers/gpu/drm/gma500/cdv_intel_lvds.c .mode_set = cdv_intel_lvds_mode_set, mode_set 297 drivers/gpu/drm/gma500/mdfld_dsi_output.c funcs->mode_set(encoder, mode_set 1016 drivers/gpu/drm/gma500/mdfld_intel_display.c .mode_set = mdfld_crtc_mode_set, mode_set 187 drivers/gpu/drm/gma500/mdfld_tmd_vid.c .mode_set = mdfld_dsi_dpi_mode_set, mode_set 75 drivers/gpu/drm/gma500/mdfld_tpo_vid.c .mode_set = mdfld_dsi_dpi_mode_set, mode_set 652 drivers/gpu/drm/gma500/oaktrail_crtc.c .mode_set = oaktrail_crtc_mode_set, mode_set 607 drivers/gpu/drm/gma500/oaktrail_hdmi.c .mode_set = oaktrail_hdmi_mode_set, mode_set 205 drivers/gpu/drm/gma500/oaktrail_lvds.c .mode_set = oaktrail_lvds_mode_set, mode_set 422 drivers/gpu/drm/gma500/psb_intel_display.c .mode_set = psb_intel_crtc_mode_set, mode_set 520 drivers/gpu/drm/gma500/psb_intel_display.c gma_crtc->mode_set.crtc = &gma_crtc->base; mode_set 525 drivers/gpu/drm/gma500/psb_intel_display.c gma_crtc->mode_set.connectors = (struct drm_connector **)(gma_crtc + 1); mode_set 526 drivers/gpu/drm/gma500/psb_intel_display.c gma_crtc->mode_set.num_connectors = 0; mode_set 166 drivers/gpu/drm/gma500/psb_intel_drv.h struct drm_mode_set mode_set; mode_set 606 drivers/gpu/drm/gma500/psb_intel_lvds.c .mode_set = psb_intel_lvds_mode_set, mode_set 1841 drivers/gpu/drm/gma500/psb_intel_sdvo.c .mode_set = psb_intel_sdvo_mode_set, mode_set 786 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c .mode_set = mdfld_dsi_dpi_mode_set, mode_set 89 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c .mode_set = hibmc_encoder_mode_set, mode_set 693 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c .mode_set = dsi_encoder_mode_set, mode_set 379 drivers/gpu/drm/i2c/ch7006_drv.c .mode_set = ch7006_encoder_mode_set, mode_set 343 drivers/gpu/drm/i2c/sil164_drv.c .mode_set = sil164_encoder_mode_set, mode_set 1673 drivers/gpu/drm/i2c/tda998x_drv.c .mode_set = tda998x_bridge_mode_set, mode_set 410 drivers/gpu/drm/i915/display/dvo_ch7017.c .mode_set = ch7017_mode_set, mode_set 362 drivers/gpu/drm/i915/display/dvo_ch7xxx.c .mode_set = ch7xxx_mode_set, mode_set 499 drivers/gpu/drm/i915/display/dvo_ivch.c .mode_set = ivch_mode_set, mode_set 706 drivers/gpu/drm/i915/display/dvo_ns2501.c .mode_set = ns2501_mode_set, mode_set 275 drivers/gpu/drm/i915/display/dvo_sil164.c .mode_set = sil164_mode_set, mode_set 314 drivers/gpu/drm/i915/display/dvo_tfp410.c .mode_set = tfp410_mode_set, mode_set 209 drivers/gpu/drm/i915/display/intel_dvo.c intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode_set 98 drivers/gpu/drm/i915/display/intel_dvo_dev.h void (*mode_set)(struct intel_dvo_device *dvo, mode_set 356 drivers/gpu/drm/imx/imx-tve.c .mode_set = imx_tve_encoder_mode_set, mode_set 881 drivers/gpu/drm/mcde/mcde_dsi.c .mode_set = mcde_dsi_bridge_mode_set, mode_set 560 drivers/gpu/drm/mediatek/mtk_dpi.c .mode_set = mtk_dpi_encoder_mode_set, mode_set 755 drivers/gpu/drm/mediatek/mtk_dsi.c .mode_set = mtk_dsi_encoder_mode_set, mode_set 1432 drivers/gpu/drm/mediatek/mtk_hdmi.c .mode_set = mtk_hdmi_bridge_mode_set, mode_set 734 drivers/gpu/drm/meson/meson_dw_hdmi.c .mode_set = meson_venc_hdmi_encoder_mode_set, mode_set 226 drivers/gpu/drm/meson/meson_venc_cvbs.c .mode_set = meson_venc_cvbs_encoder_mode_set, mode_set 1426 drivers/gpu/drm/mgag200/mgag200_mode.c .mode_set = mga_crtc_mode_set, mode_set 1493 drivers/gpu/drm/mgag200/mgag200_mode.c .mode_set = mga_encoder_mode_set, mode_set 1078 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c if (phys->ops.mode_set) mode_set 1079 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c phys->ops.mode_set(phys, mode, adj_mode); mode_set 2162 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c .mode_set = dpu_encoder_virt_mode_set, mode_set 123 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h void (*mode_set)(struct dpu_encoder_phys *encoder, mode_set 743 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c ops->mode_set = dpu_encoder_phys_cmd_mode_set; mode_set 683 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c ops->mode_set = dpu_encoder_phys_vid_mode_set; mode_set 141 drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c .mode_set = mdp4_dsi_encoder_mode_set, mode_set 211 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c .mode_set = mdp4_dtv_encoder_mode_set, mode_set 415 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c .mode_set = mdp4_lcdc_encoder_mode_set, mode_set 582 drivers/gpu/drm/msm/dsi/dsi_manager.c .mode_set = dsi_mgr_bridge_mode_set, mode_set 72 drivers/gpu/drm/msm/edp/edp_bridge.c .mode_set = edp_bridge_mode_set, mode_set 267 drivers/gpu/drm/msm/hdmi/hdmi_bridge.c .mode_set = msm_hdmi_bridge_mode_set, mode_set 1257 drivers/gpu/drm/nouveau/dispnv04/crtc.c .mode_set = nv_crtc_mode_set, mode_set 509 drivers/gpu/drm/nouveau/dispnv04/dac.c .mode_set = nv04_dac_mode_set, mode_set 518 drivers/gpu/drm/nouveau/dispnv04/dac.c .mode_set = nv04_dac_mode_set, mode_set 475 drivers/gpu/drm/nouveau/dispnv04/dfp.c get_slave_funcs(slave_encoder)->mode_set( mode_set 659 drivers/gpu/drm/nouveau/dispnv04/dfp.c .mode_set = nv04_dfp_mode_set, mode_set 668 drivers/gpu/drm/nouveau/dispnv04/dfp.c .mode_set = nv04_dfp_mode_set, mode_set 161 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c get_slave_funcs(encoder)->mode_set(encoder, mode, adjusted_mode); mode_set 197 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c .mode_set = nv04_tv_mode_set, mode_set 774 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c .mode_set = nv17_tv_mode_set, mode_set 242 drivers/gpu/drm/omapdrm/omap_encoder.c .mode_set = omap_encoder_mode_set, mode_set 2229 drivers/gpu/drm/radeon/atombios_crtc.c .mode_set = atombios_crtc_mode_set, mode_set 2650 drivers/gpu/drm/radeon/atombios_encoders.c .mode_set = radeon_atom_ext_mode_set, mode_set 2660 drivers/gpu/drm/radeon/atombios_encoders.c .mode_set = radeon_atom_encoder_mode_set, mode_set 2670 drivers/gpu/drm/radeon/atombios_encoders.c .mode_set = radeon_atom_encoder_mode_set, mode_set 160 drivers/gpu/drm/radeon/radeon_audio.c .mode_set = radeon_audio_hdmi_mode_set, mode_set 174 drivers/gpu/drm/radeon/radeon_audio.c .mode_set = radeon_audio_hdmi_mode_set, mode_set 199 drivers/gpu/drm/radeon/radeon_audio.c .mode_set = radeon_audio_hdmi_mode_set, mode_set 211 drivers/gpu/drm/radeon/radeon_audio.c .mode_set = radeon_audio_dp_mode_set, mode_set 228 drivers/gpu/drm/radeon/radeon_audio.c .mode_set = radeon_audio_hdmi_mode_set, mode_set 241 drivers/gpu/drm/radeon/radeon_audio.c .mode_set = radeon_audio_dp_mode_set, mode_set 763 drivers/gpu/drm/radeon/radeon_audio.c if (radeon_encoder->audio && radeon_encoder->audio->mode_set) mode_set 764 drivers/gpu/drm/radeon/radeon_audio.c radeon_encoder->audio->mode_set(encoder, mode); mode_set 64 drivers/gpu/drm/radeon/radeon_audio.h void (*mode_set)(struct drm_encoder *encoder, mode_set 701 drivers/gpu/drm/radeon/radeon_display.c radeon_crtc->mode_set.crtc = &radeon_crtc->base; mode_set 702 drivers/gpu/drm/radeon/radeon_display.c radeon_crtc->mode_set.connectors = (struct drm_connector **)(radeon_crtc + 1); mode_set 703 drivers/gpu/drm/radeon/radeon_display.c radeon_crtc->mode_set.num_connectors = 0; mode_set 586 drivers/gpu/drm/radeon/radeon_dp_mst.c .mode_set = radeon_mst_encoder_mode_set, mode_set 1109 drivers/gpu/drm/radeon/radeon_legacy_crtc.c .mode_set = radeon_crtc_mode_set, mode_set 274 drivers/gpu/drm/radeon/radeon_legacy_encoders.c .mode_set = radeon_legacy_lvds_mode_set, mode_set 720 drivers/gpu/drm/radeon/radeon_legacy_encoders.c .mode_set = radeon_legacy_primary_dac_mode_set, mode_set 885 drivers/gpu/drm/radeon/radeon_legacy_encoders.c .mode_set = radeon_legacy_tmds_int_mode_set, mode_set 1028 drivers/gpu/drm/radeon/radeon_legacy_encoders.c .mode_set = radeon_legacy_tmds_ext_mode_set, mode_set 1686 drivers/gpu/drm/radeon/radeon_legacy_encoders.c .mode_set = radeon_legacy_tv_dac_mode_set, mode_set 653 drivers/gpu/drm/rcar-du/rcar_lvds.c .mode_set = rcar_lvds_mode_set, mode_set 255 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c .mode_set = rockchip_dp_drm_encoder_mode_set, mode_set 686 drivers/gpu/drm/rockchip/cdn-dp-core.c .mode_set = cdn_dp_encoder_mode_set, mode_set 310 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c .mode_set = dw_hdmi_rockchip_encoder_mode_set, mode_set 531 drivers/gpu/drm/rockchip/inno_hdmi.c .mode_set = inno_hdmi_encoder_mode_set, mode_set 450 drivers/gpu/drm/rockchip/rk3066_hdmi.c .mode_set = rk3066_hdmi_encoder_mode_set, mode_set 385 drivers/gpu/drm/shmobile/shmob_drm_crtc.c .mode_set = shmob_drm_crtc_mode_set, mode_set 558 drivers/gpu/drm/shmobile/shmob_drm_crtc.c .mode_set = shmob_drm_encoder_mode_set, mode_set 331 drivers/gpu/drm/sti/sti_dvo.c .mode_set = sti_dvo_set_mode, mode_set 569 drivers/gpu/drm/sti/sti_hda.c .mode_set = sti_hda_set_mode, mode_set 963 drivers/gpu/drm/sti/sti_hdmi.c .mode_set = sti_hdmi_set_mode, mode_set 654 drivers/gpu/drm/sti/sti_tvout.c .mode_set = sti_tvout_encoder_mode_set, mode_set 707 drivers/gpu/drm/sti/sti_tvout.c .mode_set = sti_tvout_encoder_mode_set, mode_set 755 drivers/gpu/drm/sti/sti_tvout.c .mode_set = sti_tvout_encoder_mode_set, mode_set 203 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c .mode_set = sun4i_hdmi_mode_set, mode_set 473 drivers/gpu/drm/sun4i/sun4i_tv.c .mode_set = sun4i_tv_mode_set, mode_set 29 drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c .mode_set = sun8i_dw_hdmi_encoder_mode_set, mode_set 85 drivers/gpu/drm/tilcdc/tilcdc_panel.c .mode_set = panel_encoder_mode_set, mode_set 95 drivers/gpu/drm/tilcdc/tilcdc_tfp410.c .mode_set = tfp410_encoder_mode_set, mode_set 48 drivers/gpu/drm/udl/udl_encoder.c .mode_set = udl_encoder_mode_set, mode_set 397 drivers/gpu/drm/udl/udl_modeset.c .mode_set = udl_crtc_mode_set, mode_set 214 drivers/gpu/drm/vc4/vc4_vec.c void (*mode_set)(struct vc4_vec *vec); mode_set 288 drivers/gpu/drm/vc4/vc4_vec.c .mode_set = vc4_vec_ntsc_mode_set, mode_set 292 drivers/gpu/drm/vc4/vc4_vec.c .mode_set = vc4_vec_ntsc_j_mode_set, mode_set 296 drivers/gpu/drm/vc4/vc4_vec.c .mode_set = vc4_vec_pal_mode_set, mode_set 300 drivers/gpu/drm/vc4/vc4_vec.c .mode_set = vc4_vec_pal_m_mode_set, mode_set 465 drivers/gpu/drm/vc4/vc4_vec.c vec->tv_mode->mode_set(vec); mode_set 208 drivers/gpu/drm/virtio/virtgpu_display.c .mode_set = virtio_gpu_enc_mode_set, mode_set 254 drivers/gpu/drm/zte/zx_hdmi.c .mode_set = zx_hdmi_encoder_mode_set, mode_set 218 drivers/gpu/drm/zte/zx_tvenc.c .mode_set = zx_tvenc_encoder_mode_set, mode_set 198 include/drm/drm_bridge.h void (*mode_set)(struct drm_bridge *bridge, mode_set 61 include/drm/drm_encoder_slave.h void (*mode_set)(struct drm_encoder *encoder, mode_set 206 include/drm/drm_modeset_helper_vtables.h int (*mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode, mode_set 621 include/drm/drm_modeset_helper_vtables.h void (*mode_set)(struct drm_encoder *encoder,