mode_config      1312 arch/arm/mach-davinci/board-da850-evm.c 	.mode_config = {
mode_config       128 arch/arm/mach-davinci/pdata-quirks.c 	.mode_config = {
mode_config       815 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c 		list_for_each_entry(tmp, &adev->ddev->mode_config.encoder_list,
mode_config       577 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 	if (property == dev->mode_config.scaling_mode_property) {
mode_config       782 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 	if (property != dev->mode_config.scaling_mode_property)
mode_config      1026 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 				list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
mode_config      1518 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config      1538 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      1602 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 						   dev->mode_config.scaling_mode_property,
mode_config      1627 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 						   dev->mode_config.scaling_mode_property,
mode_config      1661 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 						      dev->mode_config.scaling_mode_property,
mode_config      1688 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 						   dev->mode_config.scaling_mode_property,
mode_config      1713 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 						   dev->mode_config.scaling_mode_property,
mode_config      1752 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 						   dev->mode_config.scaling_mode_property,
mode_config      1806 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 						   dev->mode_config.scaling_mode_property,
mode_config      1856 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 						   dev->mode_config.scaling_mode_property,
mode_config      1890 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 						      dev->mode_config.scaling_mode_property,
mode_config      1914 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c 						      dev->mode_config.scaling_mode_property,
mode_config      3039 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 		list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config      3044 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config      3159 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config      3190 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 			list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       289 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
mode_config       377 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       411 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       697 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       128 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 				    &ddev->mode_config.crtc_list, head) {
mode_config       148 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       174 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c 		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config      1267 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 	list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
mode_config        45 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config        47 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config        66 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config        85 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       101 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       119 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c 	list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
mode_config       257 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 	info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base;
mode_config       321 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 	if (list_empty(&adev->ddev->mode_config.connector_list))
mode_config        88 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config        91 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 	mutex_lock(&mode_config->mutex);
mode_config        92 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 	list_for_each_entry(connector, &mode_config->connector_list, head)
mode_config        94 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 	mutex_unlock(&mode_config->mutex);
mode_config       267 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 	list_for_each_entry(test_crtc, &dev->mode_config.crtc_list, head) {
mode_config       293 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 	list_for_each_entry(test_crtc, &dev->mode_config.crtc_list, head) {
mode_config       329 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 	list_for_each_entry(test_crtc, &dev->mode_config.crtc_list, head) {
mode_config      1679 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       335 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       387 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config      1233 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      1276 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      1342 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      2622 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      2689 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
mode_config      2690 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
mode_config      2772 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	adev->ddev->mode_config.funcs = &amdgpu_mode_funcs;
mode_config      2774 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	adev->ddev->mode_config.async_page_flip = true;
mode_config      2776 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	adev->ddev->mode_config.max_width = 16384;
mode_config      2777 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	adev->ddev->mode_config.max_height = 16384;
mode_config      2779 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	adev->ddev->mode_config.preferred_depth = 24;
mode_config      2780 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	adev->ddev->mode_config.prefer_shadow = 1;
mode_config      2782 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
mode_config      2788 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	adev->ddev->mode_config.max_width = 16384;
mode_config      2789 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	adev->ddev->mode_config.max_height = 16384;
mode_config      3470 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       353 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       404 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config      1259 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      1302 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      1368 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      2730 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      2797 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
mode_config      2798 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
mode_config      2893 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	adev->ddev->mode_config.funcs = &amdgpu_mode_funcs;
mode_config      2895 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	adev->ddev->mode_config.async_page_flip = true;
mode_config      2897 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	adev->ddev->mode_config.max_width = 16384;
mode_config      2898 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	adev->ddev->mode_config.max_height = 16384;
mode_config      2900 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	adev->ddev->mode_config.preferred_depth = 24;
mode_config      2901 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	adev->ddev->mode_config.prefer_shadow = 1;
mode_config      2903 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
mode_config      2909 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	adev->ddev->mode_config.max_width = 16384;
mode_config      2910 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	adev->ddev->mode_config.max_height = 16384;
mode_config      3596 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       286 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       329 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config      1135 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      1176 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      1247 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      1642 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      2510 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      2577 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
mode_config      2578 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
mode_config      2647 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	adev->ddev->mode_config.funcs = &amdgpu_mode_funcs;
mode_config      2648 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	adev->ddev->mode_config.async_page_flip = true;
mode_config      2649 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	adev->ddev->mode_config.max_width = 16384;
mode_config      2650 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	adev->ddev->mode_config.max_height = 16384;
mode_config      2651 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	adev->ddev->mode_config.preferred_depth = 24;
mode_config      2652 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	adev->ddev->mode_config.prefer_shadow = 1;
mode_config      2653 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
mode_config      2659 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	adev->ddev->mode_config.max_width = 16384;
mode_config      2660 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	adev->ddev->mode_config.max_height = 16384;
mode_config      3280 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       280 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       322 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config      1172 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      1231 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      1295 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
mode_config      2530 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      2597 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	adev->ddev->mode_config.cursor_width = amdgpu_crtc->max_cursor_width;
mode_config      2598 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	adev->ddev->mode_config.cursor_height = amdgpu_crtc->max_cursor_height;
mode_config      2669 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	adev->ddev->mode_config.funcs = &amdgpu_mode_funcs;
mode_config      2671 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	adev->ddev->mode_config.async_page_flip = true;
mode_config      2673 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	adev->ddev->mode_config.max_width = 16384;
mode_config      2674 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	adev->ddev->mode_config.max_height = 16384;
mode_config      2676 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	adev->ddev->mode_config.preferred_depth = 24;
mode_config      2677 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	adev->ddev->mode_config.prefer_shadow = 1;
mode_config      2679 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
mode_config      2685 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	adev->ddev->mode_config.max_width = 16384;
mode_config      2686 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	adev->ddev->mode_config.max_height = 16384;
mode_config      3358 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       370 drivers/gpu/drm/amd/amdgpu/dce_virtual.c 	adev->ddev->mode_config.funcs = &amdgpu_mode_funcs;
mode_config       372 drivers/gpu/drm/amd/amdgpu/dce_virtual.c 	adev->ddev->mode_config.max_width = 16384;
mode_config       373 drivers/gpu/drm/amd/amdgpu/dce_virtual.c 	adev->ddev->mode_config.max_height = 16384;
mode_config       375 drivers/gpu/drm/amd/amdgpu/dce_virtual.c 	adev->ddev->mode_config.preferred_depth = 24;
mode_config       376 drivers/gpu/drm/amd/amdgpu/dce_virtual.c 	adev->ddev->mode_config.prefer_shadow = 1;
mode_config       378 drivers/gpu/drm/amd/amdgpu/dce_virtual.c 	adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
mode_config       384 drivers/gpu/drm/amd/amdgpu/dce_virtual.c 	adev->ddev->mode_config.max_width = 16384;
mode_config       385 drivers/gpu/drm/amd/amdgpu/dce_virtual.c 	adev->ddev->mode_config.max_height = 16384;
mode_config       250 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       738 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	adev->ddev->mode_config.cursor_width = adev->dm.dc->caps.max_cursor_size;
mode_config       739 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	adev->ddev->mode_config.cursor_height = adev->dm.dc->caps.max_cursor_size;
mode_config       902 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config       904 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       920 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config       967 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config       969 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	list_for_each_entry(connector, &dev->mode_config.connector_list,
mode_config       989 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config      1203 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	list_for_each_entry(connector, &ddev->mode_config.connector_list, head) {
mode_config      1351 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		mutex_lock(&dev->mode_config.mutex);
mode_config      1376 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		mutex_unlock(&dev->mode_config.mutex);
mode_config      1407 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	mutex_lock(&dev->mode_config.mutex);
mode_config      1453 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config      1656 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 			&dev->mode_config.connector_list, head)	{
mode_config      2012 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	adev->ddev->mode_config.funcs = (void *)&amdgpu_dm_mode_funcs;
mode_config      2013 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	adev->ddev->mode_config.helper_private = &amdgpu_dm_mode_config_helperfuncs;
mode_config      2015 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	adev->ddev->mode_config.max_width = 16384;
mode_config      2016 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	adev->ddev->mode_config.max_height = 16384;
mode_config      2018 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	adev->ddev->mode_config.preferred_depth = 24;
mode_config      2019 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	adev->ddev->mode_config.prefer_shadow = 1;
mode_config      2021 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	adev->ddev->mode_config.async_page_flip = true;
mode_config      2023 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	adev->ddev->mode_config.fb_base = adev->gmc.aper_base;
mode_config      3848 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	if (property == dev->mode_config.scaling_mode_property) {
mode_config      3900 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	if (property == dev->mode_config.scaling_mode_property) {
mode_config      5076 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 				dm->ddev->mode_config.scaling_mode_property,
mode_config      5106 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 			dm->ddev->mode_config.hdr_output_metadata_property, 0);
mode_config      6451 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	state->acquire_ctx = ddev->mode_config.acquire_ctx;
mode_config      6546 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       690 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 	mutex_lock(&dev->mode_config.mutex);
mode_config       691 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config       736 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config       737 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       736 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       769 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       340 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c 		dev->mode_config.path_property,
mode_config       344 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c 		dev->mode_config.tile_property,
mode_config        35 drivers/gpu/drm/arc/arcpgu_drv.c 	drm->mode_config.min_width = 0;
mode_config        36 drivers/gpu/drm/arc/arcpgu_drv.c 	drm->mode_config.min_height = 0;
mode_config        37 drivers/gpu/drm/arc/arcpgu_drv.c 	drm->mode_config.max_width = 1920;
mode_config        38 drivers/gpu/drm/arc/arcpgu_drv.c 	drm->mode_config.max_height = 1080;
mode_config        39 drivers/gpu/drm/arc/arcpgu_drv.c 	drm->mode_config.funcs = &arcpgu_drm_modecfg_funcs;
mode_config       242 drivers/gpu/drm/arm/display/komeda/komeda_kms.c 	struct drm_mode_config *config = &kms->base.mode_config;
mode_config       427 drivers/gpu/drm/arm/display/komeda/komeda_private_obj.c 	struct drm_mode_config *config = &kms->base.mode_config;
mode_config        93 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config        96 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c 	if ((w < mode_config->min_width) || (w > mode_config->max_width))
mode_config        99 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c 	if ((h < mode_config->min_height) || (h > mode_config->max_height))
mode_config       118 drivers/gpu/drm/arm/hdlcd_drv.c 	drm->mode_config.min_width = 0;
mode_config       119 drivers/gpu/drm/arm/hdlcd_drv.c 	drm->mode_config.min_height = 0;
mode_config       120 drivers/gpu/drm/arm/hdlcd_drv.c 	drm->mode_config.max_width = HDLCD_MAX_XRES;
mode_config       121 drivers/gpu/drm/arm/hdlcd_drv.c 	drm->mode_config.max_height = HDLCD_MAX_YRES;
mode_config       122 drivers/gpu/drm/arm/hdlcd_drv.c 	drm->mode_config.funcs = &hdlcd_mode_config_funcs;
mode_config       301 drivers/gpu/drm/arm/hdlcd_drv.c 	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
mode_config       397 drivers/gpu/drm/arm/malidp_drv.c 	drm->mode_config.min_width = hwdev->min_line_size;
mode_config       398 drivers/gpu/drm/arm/malidp_drv.c 	drm->mode_config.min_height = hwdev->min_line_size;
mode_config       399 drivers/gpu/drm/arm/malidp_drv.c 	drm->mode_config.max_width = hwdev->max_line_size;
mode_config       400 drivers/gpu/drm/arm/malidp_drv.c 	drm->mode_config.max_height = hwdev->max_line_size;
mode_config       401 drivers/gpu/drm/arm/malidp_drv.c 	drm->mode_config.funcs = &malidp_mode_config_funcs;
mode_config       402 drivers/gpu/drm/arm/malidp_drv.c 	drm->mode_config.helper_private = &malidp_mode_config_helpers;
mode_config       403 drivers/gpu/drm/arm/malidp_drv.c 	drm->mode_config.allow_fb_modifiers = true;
mode_config       855 drivers/gpu/drm/arm/malidp_drv.c 	WARN_ON(drm->mode_config.num_encoder > 2);
mode_config       856 drivers/gpu/drm/arm/malidp_drv.c 	list_for_each_entry(encoder, &drm->mode_config.encoder_list, head) {
mode_config       858 drivers/gpu/drm/arm/malidp_drv.c 				(1 << drm->mode_config.num_encoder) -  1;
mode_config       867 drivers/gpu/drm/arm/malidp_drv.c 	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
mode_config        38 drivers/gpu/drm/arm/malidp_mw.c 	return drm_add_modes_noedid(connector, dev->mode_config.max_width,
mode_config        39 drivers/gpu/drm/arm/malidp_mw.c 				    dev->mode_config.max_height);
mode_config        47 drivers/gpu/drm/arm/malidp_mw.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config        50 drivers/gpu/drm/arm/malidp_mw.c 	if ((w < mode_config->min_width) || (w > mode_config->max_width))
mode_config        53 drivers/gpu/drm/arm/malidp_mw.c 	if ((h < mode_config->min_height) || (h > mode_config->max_height))
mode_config       931 drivers/gpu/drm/arm/malidp_planes.c 	unsigned long crtcs = 1 << drm->mode_config.num_crtc;
mode_config       925 drivers/gpu/drm/armada/armada_crtc.c 	dcrtc->num = drm->mode_config.num_crtc;
mode_config       124 drivers/gpu/drm/armada/armada_drv.c 	priv->drm.mode_config.min_width = 320;
mode_config       125 drivers/gpu/drm/armada/armada_drv.c 	priv->drm.mode_config.min_height = 200;
mode_config       131 drivers/gpu/drm/armada/armada_drv.c 	priv->drm.mode_config.max_width = 1920;
mode_config       132 drivers/gpu/drm/armada/armada_drv.c 	priv->drm.mode_config.max_height = 2048;
mode_config       134 drivers/gpu/drm/armada/armada_drv.c 	priv->drm.mode_config.preferred_depth = 24;
mode_config       135 drivers/gpu/drm/armada/armada_drv.c 	priv->drm.mode_config.funcs = &armada_drm_mode_config_funcs;
mode_config       143 drivers/gpu/drm/armada/armada_drv.c 	ret = drm_vblank_init(&priv->drm, priv->drm.mode_config.num_crtc);
mode_config        70 drivers/gpu/drm/aspeed/aspeed_gfx_drv.c 	drm->mode_config.min_width = 0;
mode_config        71 drivers/gpu/drm/aspeed/aspeed_gfx_drv.c 	drm->mode_config.min_height = 0;
mode_config        72 drivers/gpu/drm/aspeed/aspeed_gfx_drv.c 	drm->mode_config.max_width = 800;
mode_config        73 drivers/gpu/drm/aspeed/aspeed_gfx_drv.c 	drm->mode_config.max_height = 600;
mode_config        74 drivers/gpu/drm/aspeed/aspeed_gfx_drv.c 	drm->mode_config.funcs = &aspeed_gfx_mode_config_funcs;
mode_config       486 drivers/gpu/drm/ast/ast_main.c 	dev->mode_config.funcs = (void *)&ast_mode_funcs;
mode_config       487 drivers/gpu/drm/ast/ast_main.c 	dev->mode_config.min_width = 0;
mode_config       488 drivers/gpu/drm/ast/ast_main.c 	dev->mode_config.min_height = 0;
mode_config       489 drivers/gpu/drm/ast/ast_main.c 	dev->mode_config.preferred_depth = 24;
mode_config       490 drivers/gpu/drm/ast/ast_main.c 	dev->mode_config.prefer_shadow = 1;
mode_config       491 drivers/gpu/drm/ast/ast_main.c 	dev->mode_config.fb_base = pci_resource_start(ast->dev->pdev, 0);
mode_config       499 drivers/gpu/drm/ast/ast_main.c 		dev->mode_config.max_width = 1920;
mode_config       500 drivers/gpu/drm/ast/ast_main.c 		dev->mode_config.max_height = 2048;
mode_config       502 drivers/gpu/drm/ast/ast_main.c 		dev->mode_config.max_width = 1600;
mode_config       503 drivers/gpu/drm/ast/ast_main.c 		dev->mode_config.max_height = 1200;
mode_config       888 drivers/gpu/drm/ast/ast_mode.c 	encoder = list_first_entry(&dev->mode_config.encoder_list, struct drm_encoder, head);
mode_config       690 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c 	dev->mode_config.min_width = dc->desc->min_width;
mode_config       691 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c 	dev->mode_config.min_height = dc->desc->min_height;
mode_config       692 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c 	dev->mode_config.max_width = dc->desc->max_width;
mode_config       693 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c 	dev->mode_config.max_height = dc->desc->max_height;
mode_config       694 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c 	dev->mode_config.funcs = &mode_config_funcs;
mode_config       190 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.max_width = 8192;
mode_config       191 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.max_height = 8192;
mode_config       193 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.fb_base = bochs->fb_base;
mode_config       194 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.preferred_depth = 24;
mode_config       195 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.prefer_shadow = 0;
mode_config       196 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.prefer_shadow_fbdev = 1;
mode_config       197 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.quirk_addfb_prefer_host_byte_order = true;
mode_config       199 drivers/gpu/drm/bochs/bochs_kms.c 	bochs->dev->mode_config.funcs = &bochs_mode_funcs;
mode_config       364 drivers/gpu/drm/cirrus/cirrus.c 				     conn->dev->mode_config.max_width,
mode_config       365 drivers/gpu/drm/cirrus/cirrus.c 				     conn->dev->mode_config.max_height);
mode_config       502 drivers/gpu/drm/cirrus/cirrus.c 	dev->mode_config.min_width = 0;
mode_config       503 drivers/gpu/drm/cirrus/cirrus.c 	dev->mode_config.min_height = 0;
mode_config       504 drivers/gpu/drm/cirrus/cirrus.c 	dev->mode_config.max_width = CIRRUS_MAX_PITCH / 2;
mode_config       505 drivers/gpu/drm/cirrus/cirrus.c 	dev->mode_config.max_height = 1024;
mode_config       506 drivers/gpu/drm/cirrus/cirrus.c 	dev->mode_config.preferred_depth = 16;
mode_config       507 drivers/gpu/drm/cirrus/cirrus.c 	dev->mode_config.prefer_shadow = 0;
mode_config       508 drivers/gpu/drm/cirrus/cirrus.c 	dev->mode_config.funcs = &cirrus_mode_config_funcs;
mode_config       587 drivers/gpu/drm/cirrus/cirrus.c 	drm_fbdev_generic_setup(dev, dev->mode_config.preferred_depth);
mode_config        91 drivers/gpu/drm/drm_atomic.c 	state->crtcs = kcalloc(dev->mode_config.num_crtc,
mode_config        95 drivers/gpu/drm/drm_atomic.c 	state->planes = kcalloc(dev->mode_config.num_total_plane,
mode_config       120 drivers/gpu/drm/drm_atomic.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       150 drivers/gpu/drm/drm_atomic.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       240 drivers/gpu/drm/drm_atomic.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       259 drivers/gpu/drm/drm_atomic.c 	struct drm_mode_config *config = &state->dev->mode_config;
mode_config       733 drivers/gpu/drm/drm_atomic.c 	list_add_tail(&obj->head, &dev->mode_config.privobj_list);
mode_config       944 drivers/gpu/drm/drm_atomic.c 	struct drm_mode_config *config = &connector->dev->mode_config;
mode_config      1039 drivers/gpu/drm/drm_atomic.c 	struct drm_mode_config *config = &state->dev->mode_config;
mode_config      1136 drivers/gpu/drm/drm_atomic.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config      1216 drivers/gpu/drm/drm_atomic.c 	struct drm_mode_config *config = &state->dev->mode_config;
mode_config      1245 drivers/gpu/drm/drm_atomic.c 	struct drm_mode_config *config = &state->dev->mode_config;
mode_config      1292 drivers/gpu/drm/drm_atomic.c 	ret = drm_modeset_lock(&dev->mode_config.connection_mutex,
mode_config      1452 drivers/gpu/drm/drm_atomic.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config      1479 drivers/gpu/drm/drm_atomic.c 		drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config      1483 drivers/gpu/drm/drm_atomic.c 		drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config       666 drivers/gpu/drm/drm_atomic_helper.c 		WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
mode_config       945 drivers/gpu/drm/drm_atomic_helper.c 	if (dev->mode_config.normalize_zpos) {
mode_config      1496 drivers/gpu/drm/drm_atomic_helper.c 	for (i = 0; i < dev->mode_config.num_crtc; i++) {
mode_config      1590 drivers/gpu/drm/drm_atomic_helper.c 	funcs = dev->mode_config.helper_private;
mode_config       424 drivers/gpu/drm/drm_atomic_uapi.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       490 drivers/gpu/drm/drm_atomic_uapi.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       519 drivers/gpu/drm/drm_atomic_uapi.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       605 drivers/gpu/drm/drm_atomic_uapi.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       678 drivers/gpu/drm/drm_atomic_uapi.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       788 drivers/gpu/drm/drm_atomic_uapi.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       864 drivers/gpu/drm/drm_atomic_uapi.c 		WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
mode_config       923 drivers/gpu/drm/drm_atomic_uapi.c 	ret = drm_modeset_lock(&state->dev->mode_config.connection_mutex,
mode_config       427 drivers/gpu/drm/drm_blend.c 	int total_planes = dev->mode_config.num_total_plane;
mode_config        35 drivers/gpu/drm/drm_client_modeset.c 	unsigned int num_crtc = dev->mode_config.num_crtc;
mode_config       240 drivers/gpu/drm/drm_client_modeset.c 	if (dev->mode_config.num_crtc > 1)
mode_config       481 drivers/gpu/drm/drm_client_modeset.c 			if (dev->mode_config.num_crtc > 1)
mode_config       657 drivers/gpu/drm/drm_client_modeset.c 	    num_connectors_enabled < dev->mode_config.num_crtc) {
mode_config       706 drivers/gpu/drm/drm_client_modeset.c 		width = dev->mode_config.max_width;
mode_config       708 drivers/gpu/drm/drm_client_modeset.c 		height = dev->mode_config.max_height;
mode_config       741 drivers/gpu/drm/drm_client_modeset.c 	mutex_lock(&dev->mode_config.mutex);
mode_config       766 drivers/gpu/drm/drm_client_modeset.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       783 drivers/gpu/drm/drm_client_modeset.c 					 (dev->mode_config.num_crtc > 1 && modeset->num_connectors == 1))) {
mode_config      1092 drivers/gpu/drm/drm_client_modeset.c 				dev->mode_config.dpms_property, dpms_mode);
mode_config       159 drivers/gpu/drm/drm_color_mgmt.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       166 drivers/gpu/drm/drm_connector.c 		container_of(work, struct drm_device, mode_config.connector_free_work);
mode_config       167 drivers/gpu/drm/drm_connector.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       199 drivers/gpu/drm/drm_connector.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       345 drivers/gpu/drm/drm_connector.c 	struct drm_mode_config *config = &connector->dev->mode_config;
mode_config       456 drivers/gpu/drm/drm_connector.c 	ida_simple_remove(&dev->mode_config.connector_ida,
mode_config       463 drivers/gpu/drm/drm_connector.c 	spin_lock_irq(&dev->mode_config.connector_list_lock);
mode_config       465 drivers/gpu/drm/drm_connector.c 	dev->mode_config.num_connector--;
mode_config       466 drivers/gpu/drm/drm_connector.c 	spin_unlock_irq(&dev->mode_config.connector_list_lock);
mode_config       653 drivers/gpu/drm/drm_connector.c 	struct drm_mode_config *config = &conn->dev->mode_config;
mode_config       675 drivers/gpu/drm/drm_connector.c 	struct drm_mode_config *config = &iter->dev->mode_config;
mode_config       713 drivers/gpu/drm/drm_connector.c 	struct drm_mode_config *config = &iter->dev->mode_config;
mode_config      1152 drivers/gpu/drm/drm_connector.c 	dev->mode_config.edid_property = prop;
mode_config      1159 drivers/gpu/drm/drm_connector.c 	dev->mode_config.dpms_property = prop;
mode_config      1167 drivers/gpu/drm/drm_connector.c 	dev->mode_config.path_property = prop;
mode_config      1175 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tile_property = prop;
mode_config      1182 drivers/gpu/drm/drm_connector.c 	dev->mode_config.link_status_property = prop;
mode_config      1187 drivers/gpu/drm/drm_connector.c 	dev->mode_config.non_desktop_property = prop;
mode_config      1193 drivers/gpu/drm/drm_connector.c 	dev->mode_config.hdr_output_metadata_property = prop;
mode_config      1209 drivers/gpu/drm/drm_connector.c 	if (dev->mode_config.dvi_i_select_subconnector_property)
mode_config      1217 drivers/gpu/drm/drm_connector.c 	dev->mode_config.dvi_i_select_subconnector_property = dvi_i_selector;
mode_config      1223 drivers/gpu/drm/drm_connector.c 	dev->mode_config.dvi_i_subconnector_property = dvi_i_subconnector;
mode_config      1265 drivers/gpu/drm/drm_connector.c 					   connector->dev->mode_config.content_type_property,
mode_config      1317 drivers/gpu/drm/drm_connector.c 				   dev->mode_config.tv_left_margin_property,
mode_config      1320 drivers/gpu/drm/drm_connector.c 				   dev->mode_config.tv_right_margin_property,
mode_config      1323 drivers/gpu/drm/drm_connector.c 				   dev->mode_config.tv_top_margin_property,
mode_config      1326 drivers/gpu/drm/drm_connector.c 				   dev->mode_config.tv_bottom_margin_property,
mode_config      1342 drivers/gpu/drm/drm_connector.c 	if (dev->mode_config.tv_left_margin_property)
mode_config      1345 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_left_margin_property =
mode_config      1347 drivers/gpu/drm/drm_connector.c 	if (!dev->mode_config.tv_left_margin_property)
mode_config      1350 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_right_margin_property =
mode_config      1352 drivers/gpu/drm/drm_connector.c 	if (!dev->mode_config.tv_right_margin_property)
mode_config      1355 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_top_margin_property =
mode_config      1357 drivers/gpu/drm/drm_connector.c 	if (!dev->mode_config.tv_top_margin_property)
mode_config      1360 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_bottom_margin_property =
mode_config      1362 drivers/gpu/drm/drm_connector.c 	if (!dev->mode_config.tv_bottom_margin_property)
mode_config      1388 drivers/gpu/drm/drm_connector.c 	if (dev->mode_config.tv_select_subconnector_property)
mode_config      1401 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_select_subconnector_property = tv_selector;
mode_config      1410 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_subconnector_property = tv_subconnector;
mode_config      1418 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_mode_property =
mode_config      1421 drivers/gpu/drm/drm_connector.c 	if (!dev->mode_config.tv_mode_property)
mode_config      1425 drivers/gpu/drm/drm_connector.c 		drm_property_add_enum(dev->mode_config.tv_mode_property,
mode_config      1428 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_brightness_property =
mode_config      1430 drivers/gpu/drm/drm_connector.c 	if (!dev->mode_config.tv_brightness_property)
mode_config      1433 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_contrast_property =
mode_config      1435 drivers/gpu/drm/drm_connector.c 	if (!dev->mode_config.tv_contrast_property)
mode_config      1438 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_flicker_reduction_property =
mode_config      1440 drivers/gpu/drm/drm_connector.c 	if (!dev->mode_config.tv_flicker_reduction_property)
mode_config      1443 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_overscan_property =
mode_config      1445 drivers/gpu/drm/drm_connector.c 	if (!dev->mode_config.tv_overscan_property)
mode_config      1448 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_saturation_property =
mode_config      1450 drivers/gpu/drm/drm_connector.c 	if (!dev->mode_config.tv_saturation_property)
mode_config      1453 drivers/gpu/drm/drm_connector.c 	dev->mode_config.tv_hue_property =
mode_config      1455 drivers/gpu/drm/drm_connector.c 	if (!dev->mode_config.tv_hue_property)
mode_config      1479 drivers/gpu/drm/drm_connector.c 	if (dev->mode_config.scaling_mode_property)
mode_config      1487 drivers/gpu/drm/drm_connector.c 	dev->mode_config.scaling_mode_property = scaling_mode;
mode_config      1658 drivers/gpu/drm/drm_connector.c 	if (dev->mode_config.aspect_ratio_property)
mode_config      1661 drivers/gpu/drm/drm_connector.c 	dev->mode_config.aspect_ratio_property =
mode_config      1666 drivers/gpu/drm/drm_connector.c 	if (dev->mode_config.aspect_ratio_property == NULL)
mode_config      1736 drivers/gpu/drm/drm_connector.c 	if (dev->mode_config.content_type_property)
mode_config      1739 drivers/gpu/drm/drm_connector.c 	dev->mode_config.content_type_property =
mode_config      1744 drivers/gpu/drm/drm_connector.c 	if (dev->mode_config.content_type_property == NULL)
mode_config      1759 drivers/gpu/drm/drm_connector.c 	if (dev->mode_config.suggested_x_property && dev->mode_config.suggested_y_property)
mode_config      1762 drivers/gpu/drm/drm_connector.c 	dev->mode_config.suggested_x_property =
mode_config      1765 drivers/gpu/drm/drm_connector.c 	dev->mode_config.suggested_y_property =
mode_config      1768 drivers/gpu/drm/drm_connector.c 	if (dev->mode_config.suggested_x_property == NULL ||
mode_config      1769 drivers/gpu/drm/drm_connector.c 	    dev->mode_config.suggested_y_property == NULL)
mode_config      1799 drivers/gpu/drm/drm_connector.c 	                                       dev->mode_config.path_property);
mode_config      1829 drivers/gpu/drm/drm_connector.c 		                                        dev->mode_config.tile_property);
mode_config      1844 drivers/gpu/drm/drm_connector.c 	                                       dev->mode_config.tile_property);
mode_config      1891 drivers/gpu/drm/drm_connector.c 				      dev->mode_config.non_desktop_property,
mode_config      1899 drivers/gpu/drm/drm_connector.c 	                                       dev->mode_config.edid_property);
mode_config      1930 drivers/gpu/drm/drm_connector.c 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config      1932 drivers/gpu/drm/drm_connector.c 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config      2021 drivers/gpu/drm/drm_connector.c 	prop = dev->mode_config.panel_orientation_property;
mode_config      2030 drivers/gpu/drm/drm_connector.c 		dev->mode_config.panel_orientation_property = prop;
mode_config      2047 drivers/gpu/drm/drm_connector.c 	if (property == connector->dev->mode_config.dpms_property) {
mode_config      2160 drivers/gpu/drm/drm_connector.c 	mutex_lock(&dev->mode_config.mutex);
mode_config      2163 drivers/gpu/drm/drm_connector.c 					     dev->mode_config.max_width,
mode_config      2164 drivers/gpu/drm/drm_connector.c 					     dev->mode_config.max_height);
mode_config      2202 drivers/gpu/drm/drm_connector.c 				mutex_unlock(&dev->mode_config.mutex);
mode_config      2210 drivers/gpu/drm/drm_connector.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config      2212 drivers/gpu/drm/drm_connector.c 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config      2225 drivers/gpu/drm/drm_connector.c 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config      2250 drivers/gpu/drm/drm_connector.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config      2251 drivers/gpu/drm/drm_connector.c 	idr_remove(&dev->mode_config.tile_idr, tg->id);
mode_config      2252 drivers/gpu/drm/drm_connector.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config      2285 drivers/gpu/drm/drm_connector.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config      2286 drivers/gpu/drm/drm_connector.c 	idr_for_each_entry(&dev->mode_config.tile_idr, tg, id) {
mode_config      2290 drivers/gpu/drm/drm_connector.c 			mutex_unlock(&dev->mode_config.idr_mutex);
mode_config      2294 drivers/gpu/drm/drm_connector.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config      2324 drivers/gpu/drm/drm_connector.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config      2325 drivers/gpu/drm/drm_connector.c 	ret = idr_alloc(&dev->mode_config.tile_idr, tg, 1, 0, GFP_KERNEL);
mode_config      2333 drivers/gpu/drm/drm_connector.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config       232 drivers/gpu/drm/drm_crtc.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       334 drivers/gpu/drm/drm_crtc.c 	dev->mode_config.num_crtc--;
mode_config       528 drivers/gpu/drm/drm_crtc.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       564 drivers/gpu/drm/drm_crtc.c 	mutex_lock(&crtc->dev->mode_config.mutex);
mode_config       732 drivers/gpu/drm/drm_crtc.c 	mutex_unlock(&crtc->dev->mode_config.mutex);
mode_config       105 drivers/gpu/drm/drm_crtc_helper.c 		WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
mode_config       106 drivers/gpu/drm/drm_crtc_helper.c 		WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
mode_config       145 drivers/gpu/drm/drm_crtc_helper.c 		WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
mode_config       552 drivers/gpu/drm/drm_crtc_helper.c 	save_encoder_crtcs = kcalloc(dev->mode_config.num_encoder,
mode_config       557 drivers/gpu/drm/drm_crtc_helper.c 	save_connector_encoders = kcalloc(dev->mode_config.num_connector,
mode_config        99 drivers/gpu/drm/drm_damage_helper.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config      3932 drivers/gpu/drm/drm_dp_mst_topology.c 	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
mode_config       116 drivers/gpu/drm/drm_encoder.c 	if (WARN_ON(dev->mode_config.num_encoder >= 32))
mode_config       142 drivers/gpu/drm/drm_encoder.c 	list_add_tail(&encoder->head, &dev->mode_config.encoder_list);
mode_config       143 drivers/gpu/drm/drm_encoder.c 	encoder->index = dev->mode_config.num_encoder++;
mode_config       182 drivers/gpu/drm/drm_encoder.c 	dev->mode_config.num_encoder--;
mode_config       233 drivers/gpu/drm/drm_encoder.c 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config       239 drivers/gpu/drm/drm_encoder.c 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config       623 drivers/gpu/drm/drm_fb_helper.c 	return dev->mode_config.prefer_shadow_fbdev ||
mode_config       624 drivers/gpu/drm/drm_fb_helper.c 	       dev->mode_config.prefer_shadow ||
mode_config      1804 drivers/gpu/drm/drm_fb_helper.c 	width = dev->mode_config.max_width;
mode_config      1805 drivers/gpu/drm/drm_fb_helper.c 	height = dev->mode_config.max_height;
mode_config      1995 drivers/gpu/drm/drm_fb_helper.c 		preferred_bpp = dev->mode_config.preferred_depth;
mode_config      2309 drivers/gpu/drm/drm_fb_helper.c 	if (!dev->mode_config.num_connector) {
mode_config      2395 drivers/gpu/drm/drm_fb_helper.c 		preferred_bpp = dev->mode_config.preferred_depth;
mode_config       114 drivers/gpu/drm/drm_fourcc.c 	if (dev->mode_config.quirk_addfb_prefer_host_byte_order) {
mode_config       125 drivers/gpu/drm/drm_fourcc.c 	if (dev->mode_config.quirk_addfb_prefer_xbgr_30bpp &&
mode_config       325 drivers/gpu/drm/drm_fourcc.c 	if (dev->mode_config.funcs->get_format_info)
mode_config       326 drivers/gpu/drm/drm_fourcc.c 		info = dev->mode_config.funcs->get_format_info(mode_cmd);
mode_config       294 drivers/gpu/drm/drm_framebuffer.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       315 drivers/gpu/drm/drm_framebuffer.c 	    !dev->mode_config.allow_fb_modifiers) {
mode_config       324 drivers/gpu/drm/drm_framebuffer.c 	fb = dev->mode_config.funcs->fb_create(dev, file_priv, r);
mode_config       377 drivers/gpu/drm/drm_framebuffer.c 	if (!dev->mode_config.quirk_addfb_prefer_host_byte_order) {
mode_config       741 drivers/gpu/drm/drm_framebuffer.c 	mutex_lock(&dev->mode_config.fb_lock);
mode_config       742 drivers/gpu/drm/drm_framebuffer.c 	dev->mode_config.num_fb++;
mode_config       743 drivers/gpu/drm/drm_framebuffer.c 	list_add(&fb->head, &dev->mode_config.fb_list);
mode_config       744 drivers/gpu/drm/drm_framebuffer.c 	mutex_unlock(&dev->mode_config.fb_lock);
mode_config       825 drivers/gpu/drm/drm_framebuffer.c 	mutex_lock(&dev->mode_config.fb_lock);
mode_config       827 drivers/gpu/drm/drm_framebuffer.c 	dev->mode_config.num_fb--;
mode_config       828 drivers/gpu/drm/drm_framebuffer.c 	mutex_unlock(&dev->mode_config.fb_lock);
mode_config      1074 drivers/gpu/drm/drm_framebuffer.c 	mutex_lock(&dev->mode_config.fb_lock);
mode_config      1079 drivers/gpu/drm/drm_framebuffer.c 	mutex_unlock(&dev->mode_config.fb_lock);
mode_config       396 drivers/gpu/drm/drm_hdcp.c 			dev->mode_config.content_protection_property;
mode_config       407 drivers/gpu/drm/drm_hdcp.c 	dev->mode_config.content_protection_property = prop;
mode_config       412 drivers/gpu/drm/drm_hdcp.c 	prop = dev->mode_config.hdcp_content_type_property;
mode_config       423 drivers/gpu/drm/drm_hdcp.c 	dev->mode_config.hdcp_content_type_property = prop;
mode_config       449 drivers/gpu/drm/drm_hdcp.c 	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
mode_config       455 drivers/gpu/drm/drm_hdcp.c 				 dev->mode_config.content_protection_property);
mode_config       272 drivers/gpu/drm/drm_ioctl.c 		req->value = dev->mode_config.preferred_depth;
mode_config       275 drivers/gpu/drm/drm_ioctl.c 		req->value = dev->mode_config.prefer_shadow;
mode_config       278 drivers/gpu/drm/drm_ioctl.c 		req->value = dev->mode_config.async_page_flip;
mode_config       288 drivers/gpu/drm/drm_ioctl.c 		if (dev->mode_config.cursor_width)
mode_config       289 drivers/gpu/drm/drm_ioctl.c 			req->value = dev->mode_config.cursor_width;
mode_config       294 drivers/gpu/drm/drm_ioctl.c 		if (dev->mode_config.cursor_height)
mode_config       295 drivers/gpu/drm/drm_ioctl.c 			req->value = dev->mode_config.cursor_height;
mode_config       300 drivers/gpu/drm/drm_ioctl.c 		req->value = dev->mode_config.allow_fb_modifiers;
mode_config        52 drivers/gpu/drm/drm_lease.c 	lockdep_assert_held(&master->dev->mode_config.idr_mutex);
mode_config        69 drivers/gpu/drm/drm_lease.c 	lockdep_assert_held(&master->dev->mode_config.idr_mutex);
mode_config        90 drivers/gpu/drm/drm_lease.c 	lockdep_assert_held(&master->dev->mode_config.idr_mutex);
mode_config       136 drivers/gpu/drm/drm_lease.c 	mutex_lock(&master->dev->mode_config.idr_mutex);
mode_config       138 drivers/gpu/drm/drm_lease.c 	mutex_unlock(&master->dev->mode_config.idr_mutex);
mode_config       165 drivers/gpu/drm/drm_lease.c 	mutex_lock(&master->dev->mode_config.idr_mutex);
mode_config       166 drivers/gpu/drm/drm_lease.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       177 drivers/gpu/drm/drm_lease.c 	mutex_unlock(&master->dev->mode_config.idr_mutex);
mode_config       213 drivers/gpu/drm/drm_lease.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config       217 drivers/gpu/drm/drm_lease.c 		if (!idr_find(&dev->mode_config.object_idr, object))
mode_config       243 drivers/gpu/drm/drm_lease.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config       247 drivers/gpu/drm/drm_lease.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config       267 drivers/gpu/drm/drm_lease.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config       285 drivers/gpu/drm/drm_lease.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config       306 drivers/gpu/drm/drm_lease.c 	lockdep_assert_held(&top->dev->mode_config.idr_mutex);
mode_config       344 drivers/gpu/drm/drm_lease.c 	mutex_lock(&top->dev->mode_config.idr_mutex);
mode_config       346 drivers/gpu/drm/drm_lease.c 	mutex_unlock(&top->dev->mode_config.idr_mutex);
mode_config       621 drivers/gpu/drm/drm_lease.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config       641 drivers/gpu/drm/drm_lease.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config       677 drivers/gpu/drm/drm_lease.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config       681 drivers/gpu/drm/drm_lease.c 		object_idr = &lessee->dev->mode_config.object_idr;
mode_config       701 drivers/gpu/drm/drm_lease.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config       730 drivers/gpu/drm/drm_lease.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config       749 drivers/gpu/drm/drm_lease.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config       358 drivers/gpu/drm/drm_mipi_dbi.c 	u16 height = drm->mode_config.min_height;
mode_config       359 drivers/gpu/drm/drm_mipi_dbi.c 	u16 width = drm->mode_config.min_width;
mode_config       536 drivers/gpu/drm/drm_mipi_dbi.c 	drm->mode_config.funcs = &mipi_dbi_mode_config_funcs;
mode_config       537 drivers/gpu/drm/drm_mipi_dbi.c 	drm->mode_config.min_width = dbidev->mode.hdisplay;
mode_config       538 drivers/gpu/drm/drm_mipi_dbi.c 	drm->mode_config.max_width = dbidev->mode.hdisplay;
mode_config       539 drivers/gpu/drm/drm_mipi_dbi.c 	drm->mode_config.min_height = dbidev->mode.vdisplay;
mode_config       540 drivers/gpu/drm/drm_mipi_dbi.c 	drm->mode_config.max_height = dbidev->mode.vdisplay;
mode_config       572 drivers/gpu/drm/drm_mipi_dbi.c 	dbidev->drm.mode_config.preferred_depth = 16;
mode_config       120 drivers/gpu/drm/drm_mode_config.c 	card_res->max_height = dev->mode_config.max_height;
mode_config       121 drivers/gpu/drm/drm_mode_config.c 	card_res->min_height = dev->mode_config.min_height;
mode_config       122 drivers/gpu/drm/drm_mode_config.c 	card_res->max_width = dev->mode_config.max_width;
mode_config       123 drivers/gpu/drm/drm_mode_config.c 	card_res->min_width = dev->mode_config.min_width;
mode_config       230 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.plane_type_property = prop;
mode_config       236 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_src_x = prop;
mode_config       242 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_src_y = prop;
mode_config       248 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_src_w = prop;
mode_config       254 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_src_h = prop;
mode_config       260 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_crtc_x = prop;
mode_config       266 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_crtc_y = prop;
mode_config       272 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_crtc_w = prop;
mode_config       278 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_crtc_h = prop;
mode_config       284 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_fb_id = prop;
mode_config       290 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_in_fence_fd = prop;
mode_config       296 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_out_fence_ptr = prop;
mode_config       302 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_crtc_id = prop;
mode_config       309 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_fb_damage_clips = prop;
mode_config       315 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_active = prop;
mode_config       322 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_mode_id = prop;
mode_config       328 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.prop_vrr_enabled = prop;
mode_config       335 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.degamma_lut_property = prop;
mode_config       342 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.degamma_lut_size_property = prop;
mode_config       349 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.ctm_property = prop;
mode_config       356 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.gamma_lut_property = prop;
mode_config       363 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.gamma_lut_size_property = prop;
mode_config       370 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.modifiers_property = prop;
mode_config       389 drivers/gpu/drm/drm_mode_config.c 	mutex_init(&dev->mode_config.mutex);
mode_config       390 drivers/gpu/drm/drm_mode_config.c 	drm_modeset_lock_init(&dev->mode_config.connection_mutex);
mode_config       391 drivers/gpu/drm/drm_mode_config.c 	mutex_init(&dev->mode_config.idr_mutex);
mode_config       392 drivers/gpu/drm/drm_mode_config.c 	mutex_init(&dev->mode_config.fb_lock);
mode_config       393 drivers/gpu/drm/drm_mode_config.c 	mutex_init(&dev->mode_config.blob_lock);
mode_config       394 drivers/gpu/drm/drm_mode_config.c 	INIT_LIST_HEAD(&dev->mode_config.fb_list);
mode_config       395 drivers/gpu/drm/drm_mode_config.c 	INIT_LIST_HEAD(&dev->mode_config.crtc_list);
mode_config       396 drivers/gpu/drm/drm_mode_config.c 	INIT_LIST_HEAD(&dev->mode_config.connector_list);
mode_config       397 drivers/gpu/drm/drm_mode_config.c 	INIT_LIST_HEAD(&dev->mode_config.encoder_list);
mode_config       398 drivers/gpu/drm/drm_mode_config.c 	INIT_LIST_HEAD(&dev->mode_config.property_list);
mode_config       399 drivers/gpu/drm/drm_mode_config.c 	INIT_LIST_HEAD(&dev->mode_config.property_blob_list);
mode_config       400 drivers/gpu/drm/drm_mode_config.c 	INIT_LIST_HEAD(&dev->mode_config.plane_list);
mode_config       401 drivers/gpu/drm/drm_mode_config.c 	INIT_LIST_HEAD(&dev->mode_config.privobj_list);
mode_config       402 drivers/gpu/drm/drm_mode_config.c 	idr_init(&dev->mode_config.object_idr);
mode_config       403 drivers/gpu/drm/drm_mode_config.c 	idr_init(&dev->mode_config.tile_idr);
mode_config       404 drivers/gpu/drm/drm_mode_config.c 	ida_init(&dev->mode_config.connector_ida);
mode_config       405 drivers/gpu/drm/drm_mode_config.c 	spin_lock_init(&dev->mode_config.connector_list_lock);
mode_config       407 drivers/gpu/drm/drm_mode_config.c 	init_llist_head(&dev->mode_config.connector_free_list);
mode_config       408 drivers/gpu/drm/drm_mode_config.c 	INIT_WORK(&dev->mode_config.connector_free_work, drm_connector_free_work_fn);
mode_config       413 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.num_fb = 0;
mode_config       414 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.num_connector = 0;
mode_config       415 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.num_crtc = 0;
mode_config       416 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.num_encoder = 0;
mode_config       417 drivers/gpu/drm/drm_mode_config.c 	dev->mode_config.num_total_plane = 0;
mode_config       445 drivers/gpu/drm/drm_mode_config.c 	list_for_each_entry_safe(encoder, enct, &dev->mode_config.encoder_list,
mode_config       460 drivers/gpu/drm/drm_mode_config.c 	flush_work(&dev->mode_config.connector_free_work);
mode_config       461 drivers/gpu/drm/drm_mode_config.c 	if (WARN_ON(!list_empty(&dev->mode_config.connector_list))) {
mode_config       468 drivers/gpu/drm/drm_mode_config.c 	list_for_each_entry_safe(property, pt, &dev->mode_config.property_list,
mode_config       473 drivers/gpu/drm/drm_mode_config.c 	list_for_each_entry_safe(plane, plt, &dev->mode_config.plane_list,
mode_config       478 drivers/gpu/drm/drm_mode_config.c 	list_for_each_entry_safe(crtc, ct, &dev->mode_config.crtc_list, head) {
mode_config       482 drivers/gpu/drm/drm_mode_config.c 	list_for_each_entry_safe(blob, bt, &dev->mode_config.property_blob_list,
mode_config       495 drivers/gpu/drm/drm_mode_config.c 	WARN_ON(!list_empty(&dev->mode_config.fb_list));
mode_config       496 drivers/gpu/drm/drm_mode_config.c 	list_for_each_entry_safe(fb, fbt, &dev->mode_config.fb_list, head) {
mode_config       503 drivers/gpu/drm/drm_mode_config.c 	ida_destroy(&dev->mode_config.connector_ida);
mode_config       504 drivers/gpu/drm/drm_mode_config.c 	idr_destroy(&dev->mode_config.tile_idr);
mode_config       505 drivers/gpu/drm/drm_mode_config.c 	idr_destroy(&dev->mode_config.object_idr);
mode_config       506 drivers/gpu/drm/drm_mode_config.c 	drm_modeset_lock_fini(&dev->mode_config.connection_mutex);
mode_config        47 drivers/gpu/drm/drm_mode_object.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config        48 drivers/gpu/drm/drm_mode_object.c 	ret = idr_alloc(&dev->mode_config.object_idr, register_obj ? obj : NULL,
mode_config        62 drivers/gpu/drm/drm_mode_object.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config        88 drivers/gpu/drm/drm_mode_object.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config        89 drivers/gpu/drm/drm_mode_object.c 	idr_replace(&dev->mode_config.object_idr, obj, obj->id);
mode_config        90 drivers/gpu/drm/drm_mode_object.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config       109 drivers/gpu/drm/drm_mode_object.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config       111 drivers/gpu/drm/drm_mode_object.c 		idr_remove(&dev->mode_config.object_idr, object->id);
mode_config       114 drivers/gpu/drm/drm_mode_object.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config       142 drivers/gpu/drm/drm_mode_object.c 	mutex_lock(&dev->mode_config.idr_mutex);
mode_config       143 drivers/gpu/drm/drm_mode_object.c 	obj = idr_find(&dev->mode_config.object_idr, id);
mode_config       157 drivers/gpu/drm/drm_mode_object.c 	mutex_unlock(&dev->mode_config.idr_mutex);
mode_config       480 drivers/gpu/drm/drm_mode_object.c 	if (prop == state->dev->mode_config.dpms_property) {
mode_config       110 drivers/gpu/drm/drm_modes.c 	WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
mode_config      1158 drivers/gpu/drm/drm_modes.c 	if (dev->mode_config.funcs->mode_valid)
mode_config      1159 drivers/gpu/drm/drm_modes.c 		return dev->mode_config.funcs->mode_valid(dev, mode);
mode_config      1371 drivers/gpu/drm/drm_modes.c 	WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
mode_config        56 drivers/gpu/drm/drm_modeset_helper.c 	spin_lock_irq(&dev->mode_config.connector_list_lock);
mode_config        58 drivers/gpu/drm/drm_modeset_helper.c 				 &dev->mode_config.connector_list, head) {
mode_config        65 drivers/gpu/drm/drm_modeset_helper.c 	list_splice(&panel_list, &dev->mode_config.connector_list);
mode_config        66 drivers/gpu/drm/drm_modeset_helper.c 	spin_unlock_irq(&dev->mode_config.connector_list_lock);
mode_config       211 drivers/gpu/drm/drm_modeset_helper.c 	dev->mode_config.suspend_state = state;
mode_config       238 drivers/gpu/drm/drm_modeset_helper.c 	if (WARN_ON(!dev->mode_config.suspend_state))
mode_config       241 drivers/gpu/drm/drm_modeset_helper.c 	ret = drm_atomic_helper_resume(dev, dev->mode_config.suspend_state);
mode_config       244 drivers/gpu/drm/drm_modeset_helper.c 	dev->mode_config.suspend_state = NULL;
mode_config        97 drivers/gpu/drm/drm_modeset_lock.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       151 drivers/gpu/drm/drm_modeset_lock.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       163 drivers/gpu/drm/drm_modeset_lock.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       184 drivers/gpu/drm/drm_modeset_lock.c 	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
mode_config       185 drivers/gpu/drm/drm_modeset_lock.c 	WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
mode_config       403 drivers/gpu/drm/drm_modeset_lock.c 	ret = drm_modeset_lock(&dev->mode_config.connection_mutex, ctx);
mode_config        88 drivers/gpu/drm/drm_plane.c 	const struct drm_mode_config *config = &dev->mode_config;
mode_config       181 drivers/gpu/drm/drm_plane.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       373 drivers/gpu/drm/drm_plane.c 	dev->mode_config.num_total_plane--;
mode_config      1061 drivers/gpu/drm/drm_plane.c 	if ((page_flip->flags & DRM_MODE_PAGE_FLIP_ASYNC) && !dev->mode_config.async_page_flip)
mode_config        85 drivers/gpu/drm/drm_plane_helper.c 	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
mode_config       230 drivers/gpu/drm/drm_probe_helper.c 	if (!dev->mode_config.poll_enabled || !drm_kms_helper_poll)
mode_config       241 drivers/gpu/drm/drm_probe_helper.c 	if (dev->mode_config.delayed_event) {
mode_config       257 drivers/gpu/drm/drm_probe_helper.c 		schedule_delayed_work(&dev->mode_config.output_poll_work, delay);
mode_config       271 drivers/gpu/drm/drm_probe_helper.c 	ret = drm_modeset_lock(&connector->dev->mode_config.connection_mutex, &ctx);
mode_config       317 drivers/gpu/drm/drm_probe_helper.c 	ret = drm_modeset_lock(&dev->mode_config.connection_mutex, ctx);
mode_config       401 drivers/gpu/drm/drm_probe_helper.c 	WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
mode_config       409 drivers/gpu/drm/drm_probe_helper.c 	ret = drm_modeset_lock(&dev->mode_config.connection_mutex, &ctx);
mode_config       461 drivers/gpu/drm/drm_probe_helper.c 		dev->mode_config.delayed_event = true;
mode_config       462 drivers/gpu/drm/drm_probe_helper.c 		if (dev->mode_config.poll_enabled)
mode_config       463 drivers/gpu/drm/drm_probe_helper.c 			schedule_delayed_work(&dev->mode_config.output_poll_work,
mode_config       468 drivers/gpu/drm/drm_probe_helper.c 	if (drm_kms_helper_poll != dev->mode_config.poll_running)
mode_config       471 drivers/gpu/drm/drm_probe_helper.c 	dev->mode_config.poll_running = drm_kms_helper_poll;
mode_config       569 drivers/gpu/drm/drm_probe_helper.c 	if (dev->mode_config.funcs->output_poll_changed)
mode_config       570 drivers/gpu/drm/drm_probe_helper.c 		dev->mode_config.funcs->output_poll_changed(dev);
mode_config       579 drivers/gpu/drm/drm_probe_helper.c 	struct drm_device *dev = container_of(delayed_work, struct drm_device, mode_config.output_poll_work);
mode_config       585 drivers/gpu/drm/drm_probe_helper.c 	if (!dev->mode_config.poll_enabled)
mode_config       589 drivers/gpu/drm/drm_probe_helper.c 	changed = dev->mode_config.delayed_event;
mode_config       590 drivers/gpu/drm/drm_probe_helper.c 	dev->mode_config.delayed_event = false;
mode_config       595 drivers/gpu/drm/drm_probe_helper.c 	if (!mutex_trylock(&dev->mode_config.mutex)) {
mode_config       656 drivers/gpu/drm/drm_probe_helper.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       702 drivers/gpu/drm/drm_probe_helper.c 	if (!dev->mode_config.poll_enabled)
mode_config       704 drivers/gpu/drm/drm_probe_helper.c 	cancel_delayed_work_sync(&dev->mode_config.output_poll_work);
mode_config       729 drivers/gpu/drm/drm_probe_helper.c 	INIT_DELAYED_WORK(&dev->mode_config.output_poll_work, output_poll_execute);
mode_config       730 drivers/gpu/drm/drm_probe_helper.c 	dev->mode_config.poll_enabled = true;
mode_config       742 drivers/gpu/drm/drm_probe_helper.c 	if (!dev->mode_config.poll_enabled)
mode_config       745 drivers/gpu/drm/drm_probe_helper.c 	dev->mode_config.poll_enabled = false;
mode_config       746 drivers/gpu/drm/drm_probe_helper.c 	cancel_delayed_work_sync(&dev->mode_config.output_poll_work);
mode_config       780 drivers/gpu/drm/drm_probe_helper.c 	if (!dev->mode_config.poll_enabled)
mode_config       783 drivers/gpu/drm/drm_probe_helper.c 	mutex_lock(&dev->mode_config.mutex);
mode_config       802 drivers/gpu/drm/drm_probe_helper.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       133 drivers/gpu/drm/drm_property.c 	list_add_tail(&property->head, &dev->mode_config.property_list);
mode_config       534 drivers/gpu/drm/drm_property.c 	mutex_lock(&blob->dev->mode_config.blob_lock);
mode_config       536 drivers/gpu/drm/drm_property.c 	mutex_unlock(&blob->dev->mode_config.blob_lock);
mode_config       588 drivers/gpu/drm/drm_property.c 	mutex_lock(&dev->mode_config.blob_lock);
mode_config       590 drivers/gpu/drm/drm_property.c 	              &dev->mode_config.property_blob_list);
mode_config       591 drivers/gpu/drm/drm_property.c 	mutex_unlock(&dev->mode_config.blob_lock);
mode_config       810 drivers/gpu/drm/drm_property.c 	mutex_lock(&dev->mode_config.blob_lock);
mode_config       813 drivers/gpu/drm/drm_property.c 	mutex_unlock(&dev->mode_config.blob_lock);
mode_config       837 drivers/gpu/drm/drm_property.c 	mutex_lock(&dev->mode_config.blob_lock);
mode_config       854 drivers/gpu/drm/drm_property.c 	mutex_unlock(&dev->mode_config.blob_lock);
mode_config       863 drivers/gpu/drm/drm_property.c 	mutex_unlock(&dev->mode_config.blob_lock);
mode_config       119 drivers/gpu/drm/drm_sysfs.c 	ret = mutex_lock_interruptible(&dev->mode_config.mutex);
mode_config       143 drivers/gpu/drm/drm_sysfs.c 					     dev->mode_config.max_width,
mode_config       144 drivers/gpu/drm/drm_sysfs.c 					     dev->mode_config.max_height);
mode_config       147 drivers/gpu/drm/drm_sysfs.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       200 drivers/gpu/drm/drm_sysfs.c 	mutex_lock(&connector->dev->mode_config.mutex);
mode_config       218 drivers/gpu/drm/drm_sysfs.c 	mutex_unlock(&connector->dev->mode_config.mutex);
mode_config       231 drivers/gpu/drm/drm_sysfs.c 	mutex_lock(&connector->dev->mode_config.mutex);
mode_config       236 drivers/gpu/drm/drm_sysfs.c 	mutex_unlock(&connector->dev->mode_config.mutex);
mode_config       118 drivers/gpu/drm/drm_writeback.c 	if (!dev->mode_config.writeback_fb_id_property) {
mode_config       124 drivers/gpu/drm/drm_writeback.c 		dev->mode_config.writeback_fb_id_property = prop;
mode_config       127 drivers/gpu/drm/drm_writeback.c 	if (!dev->mode_config.writeback_pixel_formats_property) {
mode_config       134 drivers/gpu/drm/drm_writeback.c 		dev->mode_config.writeback_pixel_formats_property = prop;
mode_config       137 drivers/gpu/drm/drm_writeback.c 	if (!dev->mode_config.writeback_out_fence_ptr_property) {
mode_config       143 drivers/gpu/drm/drm_writeback.c 		dev->mode_config.writeback_out_fence_ptr_property = prop;
mode_config       182 drivers/gpu/drm/drm_writeback.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config       298 drivers/gpu/drm/exynos/exynos_drm_drv.c 	list_for_each_entry(encoder, &drm->mode_config.encoder_list, head)
mode_config       301 drivers/gpu/drm/exynos/exynos_drm_drv.c 	list_for_each_entry(encoder, &drm->mode_config.encoder_list, head)
mode_config       309 drivers/gpu/drm/exynos/exynos_drm_drv.c 	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
mode_config      1557 drivers/gpu/drm/exynos/exynos_drm_dsi.c 	mutex_lock(&drm->mode_config.mutex);
mode_config      1565 drivers/gpu/drm/exynos/exynos_drm_dsi.c 	mutex_unlock(&drm->mode_config.mutex);
mode_config      1567 drivers/gpu/drm/exynos/exynos_drm_dsi.c 	if (drm->mode_config.poll_enabled)
mode_config      1580 drivers/gpu/drm/exynos/exynos_drm_dsi.c 		mutex_lock(&drm->mode_config.mutex);
mode_config      1585 drivers/gpu/drm/exynos/exynos_drm_dsi.c 		mutex_unlock(&drm->mode_config.mutex);
mode_config      1592 drivers/gpu/drm/exynos/exynos_drm_dsi.c 	if (drm->mode_config.poll_enabled)
mode_config       166 drivers/gpu/drm/exynos/exynos_drm_fb.c 	dev->mode_config.min_width = 0;
mode_config       167 drivers/gpu/drm/exynos/exynos_drm_fb.c 	dev->mode_config.min_height = 0;
mode_config       174 drivers/gpu/drm/exynos/exynos_drm_fb.c 	dev->mode_config.max_width = 4096;
mode_config       175 drivers/gpu/drm/exynos/exynos_drm_fb.c 	dev->mode_config.max_height = 4096;
mode_config       177 drivers/gpu/drm/exynos/exynos_drm_fb.c 	dev->mode_config.funcs = &exynos_drm_mode_config_funcs;
mode_config       178 drivers/gpu/drm/exynos/exynos_drm_fb.c 	dev->mode_config.helper_private = &exynos_drm_mode_config_helpers;
mode_config       180 drivers/gpu/drm/exynos/exynos_drm_fb.c 	dev->mode_config.allow_fb_modifiers = true;
mode_config       182 drivers/gpu/drm/exynos/exynos_drm_fb.c 	dev->mode_config.normalize_zpos = true;
mode_config       192 drivers/gpu/drm/exynos/exynos_drm_fbdev.c 	if (!dev->mode_config.num_crtc)
mode_config       305 drivers/gpu/drm/exynos/exynos_drm_plane.c 				       1 << dev->mode_config.num_crtc,
mode_config        73 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c 	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
mode_config        28 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_kms.c 	fsl_dev->drm->mode_config.min_width = 0;
mode_config        29 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_kms.c 	fsl_dev->drm->mode_config.min_height = 0;
mode_config        30 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_kms.c 	fsl_dev->drm->mode_config.max_width = 2031;
mode_config        31 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_kms.c 	fsl_dev->drm->mode_config.max_height = 2047;
mode_config        32 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_kms.c 	fsl_dev->drm->mode_config.funcs = &fsl_dcu_drm_mode_config_funcs;
mode_config       295 drivers/gpu/drm/gma500/cdv_device.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head)
mode_config       369 drivers/gpu/drm/gma500/cdv_device.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head)
mode_config       585 drivers/gpu/drm/gma500/cdv_intel_display.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config       591 drivers/gpu/drm/gma500/cdv_intel_display.c 	list_for_each_entry(connector, &mode_config->connector_list, head) {
mode_config       991 drivers/gpu/drm/gma500/cdv_intel_dp.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config      1001 drivers/gpu/drm/gma500/cdv_intel_dp.c 	list_for_each_entry(encoder, &mode_config->encoder_list, head) {
mode_config       331 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 				      dev->mode_config.scaling_mode_property,
mode_config       270 drivers/gpu/drm/gma500/cdv_intel_lvds.c 	list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
mode_config       636 drivers/gpu/drm/gma500/cdv_intel_lvds.c 				      dev->mode_config.scaling_mode_property,
mode_config       681 drivers/gpu/drm/gma500/cdv_intel_lvds.c 	mutex_lock(&dev->mode_config.mutex);
mode_config       742 drivers/gpu/drm/gma500/cdv_intel_lvds.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       747 drivers/gpu/drm/gma500/cdv_intel_lvds.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       400 drivers/gpu/drm/gma500/framebuffer.c 	info->fix.smem_start = dev->mode_config.fb_base;
mode_config       410 drivers/gpu/drm/gma500/framebuffer.c 		info->apertures->ranges[0].base = dev->mode_config.fb_base;
mode_config       577 drivers/gpu/drm/gma500/framebuffer.c 	list_for_each_entry(connector, &dev->mode_config.connector_list,
mode_config       631 drivers/gpu/drm/gma500/framebuffer.c 	dev->mode_config.min_width = 0;
mode_config       632 drivers/gpu/drm/gma500/framebuffer.c 	dev->mode_config.min_height = 0;
mode_config       634 drivers/gpu/drm/gma500/framebuffer.c 	dev->mode_config.funcs = &psb_mode_funcs;
mode_config       639 drivers/gpu/drm/gma500/framebuffer.c 					&(dev->mode_config.fb_base));
mode_config       645 drivers/gpu/drm/gma500/framebuffer.c 	dev->mode_config.max_width = 4096;
mode_config       646 drivers/gpu/drm/gma500/framebuffer.c 	dev->mode_config.max_height = 4096;
mode_config        29 drivers/gpu/drm/gma500/gma_display.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config        32 drivers/gpu/drm/gma500/gma_display.c 	list_for_each_entry(l_entry, &mode_config->connector_list, head) {
mode_config       566 drivers/gpu/drm/gma500/mdfld_dsi_output.c 				dev->mode_config.scaling_mode_property,
mode_config       674 drivers/gpu/drm/gma500/mdfld_intel_display.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config       729 drivers/gpu/drm/gma500/mdfld_intel_display.c 	list_for_each_entry(connector, &mode_config->connector_list, head) {
mode_config       792 drivers/gpu/drm/gma500/mdfld_intel_display.c 			dev->mode_config.scaling_mode_property, &scalingType);
mode_config       374 drivers/gpu/drm/gma500/oaktrail_crtc.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config       394 drivers/gpu/drm/gma500/oaktrail_crtc.c 	list_for_each_entry(connector, &mode_config->connector_list, head) {
mode_config       428 drivers/gpu/drm/gma500/oaktrail_crtc.c 			dev->mode_config.scaling_mode_property, &scalingType);
mode_config        86 drivers/gpu/drm/gma500/oaktrail_lvds.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config       113 drivers/gpu/drm/gma500/oaktrail_lvds.c 	list_for_each_entry(connector, &mode_config->connector_list, head) {
mode_config       125 drivers/gpu/drm/gma500/oaktrail_lvds.c 		dev->mode_config.scaling_mode_property,
mode_config       327 drivers/gpu/drm/gma500/oaktrail_lvds.c 					dev->mode_config.scaling_mode_property,
mode_config       351 drivers/gpu/drm/gma500/oaktrail_lvds.c 	mutex_lock(&dev->mode_config.mutex);
mode_config       398 drivers/gpu/drm/gma500/oaktrail_lvds.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       404 drivers/gpu/drm/gma500/oaktrail_lvds.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       187 drivers/gpu/drm/gma500/psb_device.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       192 drivers/gpu/drm/gma500/psb_device.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
mode_config       227 drivers/gpu/drm/gma500/psb_device.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
mode_config       231 drivers/gpu/drm/gma500/psb_device.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
mode_config       373 drivers/gpu/drm/gma500/psb_drv.c 	list_for_each_entry(connector, &dev->mode_config.connector_list,
mode_config       108 drivers/gpu/drm/gma500/psb_intel_display.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config       118 drivers/gpu/drm/gma500/psb_intel_display.c 	list_for_each_entry(connector, &mode_config->connector_list, head) {
mode_config       537 drivers/gpu/drm/gma500/psb_intel_display.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       551 drivers/gpu/drm/gma500/psb_intel_display.c 	list_for_each_entry(connector, &dev->mode_config.connector_list,
mode_config       386 drivers/gpu/drm/gma500/psb_intel_lvds.c 	list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
mode_config       702 drivers/gpu/drm/gma500/psb_intel_lvds.c 				      dev->mode_config.scaling_mode_property,
mode_config       743 drivers/gpu/drm/gma500/psb_intel_lvds.c 	mutex_lock(&dev->mode_config.mutex);
mode_config       798 drivers/gpu/drm/gma500/psb_intel_lvds.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       803 drivers/gpu/drm/gma500/psb_intel_lvds.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config      1239 drivers/gpu/drm/gma500/psb_intel_sdvo.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config        93 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	priv->dev->mode_config.min_width = 0;
mode_config        94 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	priv->dev->mode_config.min_height = 0;
mode_config        95 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	priv->dev->mode_config.max_width = 1920;
mode_config        96 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	priv->dev->mode_config.max_height = 1440;
mode_config        98 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	priv->dev->mode_config.fb_base = priv->fb_base;
mode_config        99 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	priv->dev->mode_config.preferred_depth = 24;
mode_config       100 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	priv->dev->mode_config.prefer_shadow = 0;
mode_config       102 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	priv->dev->mode_config.funcs = (void *)&hibmc_mode_funcs;
mode_config       294 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c 	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
mode_config       164 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 	dev->mode_config.min_width = 0;
mode_config       165 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 	dev->mode_config.min_height = 0;
mode_config       166 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 	dev->mode_config.max_width = driver_data->config_max_width;
mode_config       167 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 	dev->mode_config.max_height = driver_data->config_max_width;
mode_config       168 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 	dev->mode_config.funcs = driver_data->mode_config_funcs;
mode_config       183 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
mode_config       229 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 	mutex_lock(&dev->mode_config.mutex);
mode_config       239 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       251 drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       218 drivers/gpu/drm/i2c/ch7006_drv.c 			encoder->dev->mode_config.tv_subconnector_property,
mode_config       251 drivers/gpu/drm/i2c/ch7006_drv.c 	struct drm_mode_config *conf = &dev->mode_config;
mode_config       289 drivers/gpu/drm/i2c/ch7006_drv.c 	struct drm_mode_config *conf = &encoder->dev->mode_config;
mode_config      1603 drivers/gpu/drm/i915/display/icl_dsi.c 	mutex_lock(&dev->mode_config.mutex);
mode_config      1605 drivers/gpu/drm/i915/display/icl_dsi.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       824 drivers/gpu/drm/i915/display/intel_audio.c 	ret = drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex,
mode_config       165 drivers/gpu/drm/i915/display/intel_connector.c 	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
mode_config       273 drivers/gpu/drm/i915/display/intel_connector.c 			connector->dev->mode_config.aspect_ratio_property,
mode_config      4090 drivers/gpu/drm/i915/display/intel_ddi.c 	ret = drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex,
mode_config      4291 drivers/gpu/drm/i915/display/intel_display.c 	mutex_lock(&dev->mode_config.mutex);
mode_config      4368 drivers/gpu/drm/i915/display/intel_display.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config      10552 drivers/gpu/drm/i915/display/intel_display.c 		&plane_state->base.plane->dev->mode_config;
mode_config      10780 drivers/gpu/drm/i915/display/intel_display.c 	return plane->base.dev->mode_config.cursor_width * 4;
mode_config      11099 drivers/gpu/drm/i915/display/intel_display.c 	struct drm_mode_config *config = &dev->mode_config;
mode_config      16143 drivers/gpu/drm/i915/display/intel_display.c 	dev->mode_config.min_width = 0;
mode_config      16144 drivers/gpu/drm/i915/display/intel_display.c 	dev->mode_config.min_height = 0;
mode_config      16146 drivers/gpu/drm/i915/display/intel_display.c 	dev->mode_config.preferred_depth = 24;
mode_config      16147 drivers/gpu/drm/i915/display/intel_display.c 	dev->mode_config.prefer_shadow = 1;
mode_config      16149 drivers/gpu/drm/i915/display/intel_display.c 	dev->mode_config.allow_fb_modifiers = true;
mode_config      16151 drivers/gpu/drm/i915/display/intel_display.c 	dev->mode_config.funcs = &intel_mode_funcs;
mode_config      16186 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.max_width = 16384;
mode_config      16187 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.max_height = 16384;
mode_config      16189 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.max_width = 8192;
mode_config      16190 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.max_height = 8192;
mode_config      16192 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.max_width = 4096;
mode_config      16193 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.max_height = 4096;
mode_config      16195 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.max_width = 2048;
mode_config      16196 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.max_height = 2048;
mode_config      16200 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.cursor_width = IS_I845G(dev_priv) ? 64 : 512;
mode_config      16201 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.cursor_height = 1023;
mode_config      16203 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.cursor_width = 64;
mode_config      16204 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.cursor_height = 64;
mode_config      16206 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.cursor_width = 256;
mode_config      16207 drivers/gpu/drm/i915/display/intel_display.c 		dev->mode_config.cursor_height = 256;
mode_config      16238 drivers/gpu/drm/i915/display/intel_display.c 	intel_modeset_setup_hw_state(dev, dev->mode_config.acquire_ctx);
mode_config       321 drivers/gpu/drm/i915/display/intel_display.h 	list_for_each_entry(crtc, &(dev)->mode_config.crtc_list, head)
mode_config       325 drivers/gpu/drm/i915/display/intel_display.h 			    &(dev)->mode_config.plane_list,	\
mode_config       330 drivers/gpu/drm/i915/display/intel_display.h 			    &(dev)->mode_config.plane_list,		\
mode_config       337 drivers/gpu/drm/i915/display/intel_display.h 			    &(dev)->mode_config.plane_list,		\
mode_config       343 drivers/gpu/drm/i915/display/intel_display.h 			    &(dev)->mode_config.crtc_list,		\
mode_config       348 drivers/gpu/drm/i915/display/intel_display.h 			    &(dev)->mode_config.crtc_list,		\
mode_config       354 drivers/gpu/drm/i915/display/intel_display.h 			    &(dev)->mode_config.encoder_list,	\
mode_config       365 drivers/gpu/drm/i915/display/intel_display.h 	list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
mode_config       369 drivers/gpu/drm/i915/display/intel_display.h 	list_for_each_entry((intel_connector), &(dev)->mode_config.connector_list, base.head) \
mode_config       374 drivers/gpu/drm/i915/display/intel_display.h 	     (__i) < (__state)->base.dev->mode_config.num_total_plane && \
mode_config       382 drivers/gpu/drm/i915/display/intel_display.h 	     (__i) < (__state)->base.dev->mode_config.num_total_plane && \
mode_config       390 drivers/gpu/drm/i915/display/intel_display.h 	     (__i) < (__state)->base.dev->mode_config.num_crtc && \
mode_config       398 drivers/gpu/drm/i915/display/intel_display.h 	     (__i) < (__state)->base.dev->mode_config.num_total_plane && \
mode_config       407 drivers/gpu/drm/i915/display/intel_display.h 	     (__i) < (__state)->base.dev->mode_config.num_crtc && \
mode_config      4809 drivers/gpu/drm/i915/display/intel_dp.c 	ret = drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex,
mode_config      5358 drivers/gpu/drm/i915/display/intel_dp.c 	WARN_ON(!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
mode_config      7045 drivers/gpu/drm/i915/display/intel_dp.c 	mutex_lock(&dev->mode_config.mutex);
mode_config      7067 drivers/gpu/drm/i915/display/intel_dp.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config      7124 drivers/gpu/drm/i915/display/intel_dp.c 	mutex_lock(&connector->dev->mode_config.mutex);
mode_config      7130 drivers/gpu/drm/i915/display/intel_dp.c 	mutex_unlock(&connector->dev->mode_config.mutex);
mode_config       538 drivers/gpu/drm/i915/display/intel_dp_mst.c 	drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
mode_config       539 drivers/gpu/drm/i915/display/intel_dp_mst.c 	drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
mode_config        67 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 	WARN_ON(!drm_modeset_is_locked(&s->dev->mode_config.connection_mutex));
mode_config       871 drivers/gpu/drm/i915/display/intel_hdcp.c 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config       884 drivers/gpu/drm/i915/display/intel_hdcp.c 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config      2820 drivers/gpu/drm/i915/display/intel_hdmi.c 			connector->dev->mode_config.hdr_output_metadata_property, 0);
mode_config       284 drivers/gpu/drm/i915/display/intel_hotplug.c 	WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
mode_config       372 drivers/gpu/drm/i915/display/intel_hotplug.c 	mutex_lock(&dev->mode_config.mutex);
mode_config       415 drivers/gpu/drm/i915/display/intel_hotplug.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       607 drivers/gpu/drm/i915/display/intel_hotplug.c 	mutex_lock(&dev->mode_config.mutex);
mode_config       635 drivers/gpu/drm/i915/display/intel_hotplug.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       938 drivers/gpu/drm/i915/display/intel_lvds.c 	mutex_lock(&dev->mode_config.mutex);
mode_config       984 drivers/gpu/drm/i915/display/intel_lvds.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       998 drivers/gpu/drm/i915/display/intel_lvds.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config       465 drivers/gpu/drm/i915/display/intel_opregion.c 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config       478 drivers/gpu/drm/i915/display/intel_opregion.c 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config       755 drivers/gpu/drm/i915/display/intel_overlay.c 	WARN_ON(!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
mode_config       856 drivers/gpu/drm/i915/display/intel_overlay.c 	WARN_ON(!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
mode_config      1257 drivers/gpu/drm/i915/display/intel_panel.c 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config      1279 drivers/gpu/drm/i915/display/intel_panel.c 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config      1294 drivers/gpu/drm/i915/display/intel_panel.c 		drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config      1300 drivers/gpu/drm/i915/display/intel_panel.c 		drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config      2935 drivers/gpu/drm/i915/display/intel_sdvo.c 				 &dev->mode_config.connector_list, head) {
mode_config      1979 drivers/gpu/drm/i915/display/intel_tv.c 	drm_object_attach_property(&connector->base, dev->mode_config.tv_mode_property,
mode_config      1982 drivers/gpu/drm/i915/display/intel_tv.c 				   dev->mode_config.tv_left_margin_property,
mode_config      1985 drivers/gpu/drm/i915/display/intel_tv.c 				   dev->mode_config.tv_top_margin_property,
mode_config      1988 drivers/gpu/drm/i915/display/intel_tv.c 				   dev->mode_config.tv_right_margin_property,
mode_config      1991 drivers/gpu/drm/i915/display/intel_tv.c 				   dev->mode_config.tv_bottom_margin_property,
mode_config      1946 drivers/gpu/drm/i915/display/vlv_dsi.c 	mutex_lock(&dev->mode_config.mutex);
mode_config      1948 drivers/gpu/drm/i915/display/vlv_dsi.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config      1537 drivers/gpu/drm/i915/i915_debugfs.c 	mutex_lock(&dev->mode_config.fb_lock);
mode_config      1553 drivers/gpu/drm/i915/i915_debugfs.c 	mutex_unlock(&dev->mode_config.fb_lock);
mode_config      2768 drivers/gpu/drm/i915/i915_debugfs.c 	mutex_lock(&dev->mode_config.mutex);
mode_config      2773 drivers/gpu/drm/i915/i915_debugfs.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config      4503 drivers/gpu/drm/i915/i915_debugfs.c 		ret = drm_modeset_lock(&dev->mode_config.connection_mutex,
mode_config      5492 drivers/gpu/drm/i915/intel_pm.c 		ret = drm_modeset_lock(&dev->mode_config.connection_mutex,
mode_config       222 drivers/gpu/drm/imx/imx-drm-core.c 	drm->mode_config.min_width = 1;
mode_config       223 drivers/gpu/drm/imx/imx-drm-core.c 	drm->mode_config.min_height = 1;
mode_config       224 drivers/gpu/drm/imx/imx-drm-core.c 	drm->mode_config.max_width = 4096;
mode_config       225 drivers/gpu/drm/imx/imx-drm-core.c 	drm->mode_config.max_height = 4096;
mode_config       226 drivers/gpu/drm/imx/imx-drm-core.c 	drm->mode_config.funcs = &imx_drm_mode_config_funcs;
mode_config       227 drivers/gpu/drm/imx/imx-drm-core.c 	drm->mode_config.helper_private = &imx_drm_mode_config_helpers;
mode_config       228 drivers/gpu/drm/imx/imx-drm-core.c 	drm->mode_config.allow_fb_modifiers = true;
mode_config       229 drivers/gpu/drm/imx/imx-drm-core.c 	drm->mode_config.normalize_zpos = true;
mode_config       278 drivers/gpu/drm/imx/ipuv3-crtc.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       636 drivers/gpu/drm/ingenic/ingenic-drm.c 	drm->mode_config.min_width = 0;
mode_config       637 drivers/gpu/drm/ingenic/ingenic-drm.c 	drm->mode_config.min_height = 0;
mode_config       638 drivers/gpu/drm/ingenic/ingenic-drm.c 	drm->mode_config.max_width = 800;
mode_config       639 drivers/gpu/drm/ingenic/ingenic-drm.c 	drm->mode_config.max_height = 600;
mode_config       640 drivers/gpu/drm/ingenic/ingenic-drm.c 	drm->mode_config.funcs = &ingenic_drm_mode_config_funcs;
mode_config       164 drivers/gpu/drm/mcde/mcde_drv.c 	struct drm_mode_config *mode_config;
mode_config       173 drivers/gpu/drm/mcde/mcde_drv.c 	mode_config = &drm->mode_config;
mode_config       174 drivers/gpu/drm/mcde/mcde_drv.c 	mode_config->funcs = &mcde_mode_config_funcs;
mode_config       175 drivers/gpu/drm/mcde/mcde_drv.c 	mode_config->helper_private = &mcde_mode_config_helpers;
mode_config       177 drivers/gpu/drm/mcde/mcde_drv.c 	mode_config->min_width = 1;
mode_config       178 drivers/gpu/drm/mcde/mcde_drv.c 	mode_config->max_width = 1920;
mode_config       179 drivers/gpu/drm/mcde/mcde_drv.c 	mode_config->min_height = 1;
mode_config       180 drivers/gpu/drm/mcde/mcde_drv.c 	mode_config->max_height = 1080;
mode_config       228 drivers/gpu/drm/mediatek/mtk_drm_drv.c 	drm->mode_config.min_width = 64;
mode_config       229 drivers/gpu/drm/mediatek/mtk_drm_drv.c 	drm->mode_config.min_height = 64;
mode_config       236 drivers/gpu/drm/mediatek/mtk_drm_drv.c 	drm->mode_config.max_width = 4096;
mode_config       237 drivers/gpu/drm/mediatek/mtk_drm_drv.c 	drm->mode_config.max_height = 4096;
mode_config       238 drivers/gpu/drm/mediatek/mtk_drm_drv.c 	drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
mode_config       281 drivers/gpu/drm/meson/meson_drv.c 	drm->mode_config.max_width = 3840;
mode_config       282 drivers/gpu/drm/meson/meson_drv.c 	drm->mode_config.max_height = 2160;
mode_config       283 drivers/gpu/drm/meson/meson_drv.c 	drm->mode_config.funcs = &meson_mode_config_funcs;
mode_config       284 drivers/gpu/drm/meson/meson_drv.c 	drm->mode_config.helper_private	= &meson_mode_config_helpers;
mode_config       162 drivers/gpu/drm/mgag200/mgag200_main.c 	dev->mode_config.funcs = (void *)&mga_mode_funcs;
mode_config       164 drivers/gpu/drm/mgag200/mgag200_main.c 		dev->mode_config.preferred_depth = 16;
mode_config       166 drivers/gpu/drm/mgag200/mgag200_main.c 		dev->mode_config.preferred_depth = 32;
mode_config       167 drivers/gpu/drm/mgag200/mgag200_main.c 	dev->mode_config.prefer_shadow = 1;
mode_config      1705 drivers/gpu/drm/mgag200/mgag200_mode.c 	mdev->dev->mode_config.max_width = MGAG200_MAX_FB_WIDTH;
mode_config      1706 drivers/gpu/drm/mgag200/mgag200_mode.c 	mdev->dev->mode_config.max_height = MGAG200_MAX_FB_HEIGHT;
mode_config      1708 drivers/gpu/drm/mgag200/mgag200_mode.c 	mdev->dev->mode_config.fb_base = mdev->mc.vram_base;
mode_config      1065 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 	list_for_each_entry(enc, &crtc->dev->mode_config.encoder_list, head) {
mode_config       972 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 	connector_list = &dpu_kms->dev->mode_config.connector_list;
mode_config       336 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
mode_config       382 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       927 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	dev->mode_config.min_width = 0;
mode_config       928 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	dev->mode_config.min_height = 0;
mode_config       934 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	dev->mode_config.max_width =
mode_config       936 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	dev->mode_config.max_height = 4096;
mode_config       941 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c 	dev->mode_config.allow_fb_modifiers = true;
mode_config       154 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c 	struct drm_mode_config *config = &mdp4_kms->dev->mode_config;
mode_config        91 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c 	dev->mode_config.allow_fb_modifiers = true;
mode_config       558 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c 	dev->mode_config.min_width = 0;
mode_config       559 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c 	dev->mode_config.min_height = 0;
mode_config       560 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c 	dev->mode_config.max_width = 2048;
mode_config       561 drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c 	dev->mode_config.max_height = 2048;
mode_config        92 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head)
mode_config       126 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       761 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 	dev->mode_config.min_width = 0;
mode_config       762 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 	dev->mode_config.min_height = 0;
mode_config       763 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 	dev->mode_config.max_width = 0xffff;
mode_config       764 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 	dev->mode_config.max_height = 0xffff;
mode_config       279 drivers/gpu/drm/msm/dsi/dsi_manager.c 				   conn->dev->mode_config.tile_property, 0);
mode_config       708 drivers/gpu/drm/msm/dsi/dsi_manager.c 	connector_list = &dev->mode_config.connector_list;
mode_config        57 drivers/gpu/drm/msm/edp/edp_bridge.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       147 drivers/gpu/drm/msm/msm_debugfs.c 	mutex_lock(&dev->mode_config.fb_lock);
mode_config       148 drivers/gpu/drm/msm/msm_debugfs.c 	list_for_each_entry(fb, &dev->mode_config.fb_list, head) {
mode_config       155 drivers/gpu/drm/msm/msm_debugfs.c 	mutex_unlock(&dev->mode_config.fb_lock);
mode_config       481 drivers/gpu/drm/msm/msm_drv.c 	ddev->mode_config.normalize_zpos = true;
mode_config       492 drivers/gpu/drm/msm/msm_drv.c 	ddev->mode_config.funcs = &mode_config_funcs;
mode_config       493 drivers/gpu/drm/msm/msm_drv.c 	ddev->mode_config.helper_private = &mode_config_helper_funcs;
mode_config       119 drivers/gpu/drm/msm/msm_fbdev.c 	dev->mode_config.fb_base = paddr;
mode_config       212 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
mode_config       241 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	drm->mode_config.min_width	= MXSFB_MIN_XRES;
mode_config       242 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	drm->mode_config.min_height	= MXSFB_MIN_YRES;
mode_config       243 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	drm->mode_config.max_width	= MXSFB_MAX_XRES;
mode_config       244 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	drm->mode_config.max_height	= MXSFB_MAX_YRES;
mode_config       245 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	drm->mode_config.funcs		= &mxsfb_mode_config_funcs;
mode_config       246 drivers/gpu/drm/mxsfb/mxsfb_drv.c 	drm->mode_config.helper_private	= &mxsfb_mode_config_helpers;
mode_config       256 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       468 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       392 drivers/gpu/drm/nouveau/dispnv04/dac.c 		list_for_each_entry(rebind, &dev->mode_config.encoder_list, head) {
mode_config       135 drivers/gpu/drm/nouveau/dispnv04/dfp.c 		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       171 drivers/gpu/drm/nouveau/dispnv04/dfp.c 	list_for_each_entry(slave, &dev->mode_config.encoder_list, head) {
mode_config        54 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config        64 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config        91 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config        96 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, base.base.head)
mode_config       106 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       118 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       131 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       147 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       171 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, base.base.head)
mode_config       174 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(nv_crtc, &dev->mode_config.crtc_list, base.head)
mode_config       258 drivers/gpu/drm/nouveau/dispnv04/disp.c 				 &dev->mode_config.connector_list, head) {
mode_config       266 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       274 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head)
mode_config       277 drivers/gpu/drm/nouveau/dispnv04/disp.c 	list_for_each_entry(nv_encoder, &dev->mode_config.encoder_list, base.base.head)
mode_config       148 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct drm_mode_config *conf = &dev->mode_config;
mode_config       418 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 		list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
mode_config       639 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct drm_mode_config *conf = &dev->mode_config;
mode_config       691 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c 	struct drm_mode_config *conf = &encoder->dev->mode_config;
mode_config      1098 drivers/gpu/drm/nouveau/dispnv50/disp.c 	drm_object_attach_property(&mstc->connector.base, dev->mode_config.path_property, 0);
mode_config      1099 drivers/gpu/drm/nouveau/dispnv50/disp.c 	drm_object_attach_property(&mstc->connector.base, dev->mode_config.tile_property, 0);
mode_config      2265 drivers/gpu/drm/nouveau/dispnv50/disp.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      2282 drivers/gpu/drm/nouveau/dispnv50/disp.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      2338 drivers/gpu/drm/nouveau/dispnv50/disp.c 	dev->mode_config.funcs = &nv50_disp_func;
mode_config      2339 drivers/gpu/drm/nouveau/dispnv50/disp.c 	dev->mode_config.quirk_addfb_prefer_xbgr_30bpp = true;
mode_config      2340 drivers/gpu/drm/nouveau/dispnv50/disp.c 	dev->mode_config.normalize_zpos = true;
mode_config      2414 drivers/gpu/drm/nouveau/dispnv50/disp.c 	list_for_each_entry_safe(connector, tmp, &dev->mode_config.connector_list, head) {
mode_config       106 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (property == dev->mode_config.scaling_mode_property)
mode_config       137 drivers/gpu/drm/nouveau/nouveau_connector.c 	if (property == dev->mode_config.scaling_mode_property) {
mode_config       298 drivers/gpu/drm/nouveau/nouveau_connector.c 		drm_object_attach_property(&connector->base, dev->mode_config.
mode_config       335 drivers/gpu/drm/nouveau/nouveau_connector.c 		drm_object_attach_property(&connector->base, dev->mode_config.
mode_config       401 drivers/gpu/drm/nouveau/nouveau_connector.c 	list_for_each_entry(drm_connector, &dev->mode_config.connector_list, head) {
mode_config       534 drivers/gpu/drm/nouveau/nouveau_connector.c 			dev->mode_config.dvi_i_subconnector_property,
mode_config       146 drivers/gpu/drm/nouveau/nouveau_display.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       161 drivers/gpu/drm/nouveau/nouveau_display.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       174 drivers/gpu/drm/nouveau/nouveau_display.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       191 drivers/gpu/drm/nouveau/nouveau_display.c 	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
mode_config       512 drivers/gpu/drm/nouveau/nouveau_display.c 	dev->mode_config.funcs = &nouveau_mode_config_funcs;
mode_config       513 drivers/gpu/drm/nouveau/nouveau_display.c 	dev->mode_config.fb_base = device->func->resource_addr(device, 1);
mode_config       515 drivers/gpu/drm/nouveau/nouveau_display.c 	dev->mode_config.min_width = 0;
mode_config       516 drivers/gpu/drm/nouveau/nouveau_display.c 	dev->mode_config.min_height = 0;
mode_config       518 drivers/gpu/drm/nouveau/nouveau_display.c 		dev->mode_config.max_width = 2048;
mode_config       519 drivers/gpu/drm/nouveau/nouveau_display.c 		dev->mode_config.max_height = 2048;
mode_config       522 drivers/gpu/drm/nouveau/nouveau_display.c 		dev->mode_config.max_width = 4096;
mode_config       523 drivers/gpu/drm/nouveau/nouveau_display.c 		dev->mode_config.max_height = 4096;
mode_config       526 drivers/gpu/drm/nouveau/nouveau_display.c 		dev->mode_config.max_width = 8192;
mode_config       527 drivers/gpu/drm/nouveau/nouveau_display.c 		dev->mode_config.max_height = 8192;
mode_config       529 drivers/gpu/drm/nouveau/nouveau_display.c 		dev->mode_config.max_width = 16384;
mode_config       530 drivers/gpu/drm/nouveau/nouveau_display.c 		dev->mode_config.max_height = 16384;
mode_config       533 drivers/gpu/drm/nouveau/nouveau_display.c 	dev->mode_config.preferred_depth = 24;
mode_config       534 drivers/gpu/drm/nouveau/nouveau_display.c 	dev->mode_config.prefer_shadow = 1;
mode_config       537 drivers/gpu/drm/nouveau/nouveau_display.c 		dev->mode_config.async_page_flip = false;
mode_config       539 drivers/gpu/drm/nouveau/nouveau_display.c 		dev->mode_config.async_page_flip = true;
mode_config       562 drivers/gpu/drm/nouveau/nouveau_display.c 	if (dev->mode_config.num_crtc) {
mode_config       548 drivers/gpu/drm/nouveau/nouveau_drm.c 	if (dev->mode_config.num_crtc) {
mode_config       606 drivers/gpu/drm/nouveau/nouveau_drm.c 	if (dev->mode_config.num_crtc)
mode_config       816 drivers/gpu/drm/nouveau/nouveau_drm.c 	if (dev->mode_config.num_crtc) {
mode_config       861 drivers/gpu/drm/nouveau/nouveau_drm.c 	if (dev->mode_config.num_crtc) {
mode_config       887 drivers/gpu/drm/nouveau/nouveau_drm.c 	if (dev->mode_config.num_crtc) {
mode_config       547 drivers/gpu/drm/nouveau/nouveau_fbcon.c 	if (!dev->mode_config.num_crtc ||
mode_config       216 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
mode_config       217 drivers/gpu/drm/nouveau/nv04_fbcon.c 	OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
mode_config        55 drivers/gpu/drm/omapdrm/omap_connector.c 	mutex_lock(&dev->mode_config.mutex);
mode_config        58 drivers/gpu/drm/omapdrm/omap_connector.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config        55 drivers/gpu/drm/omapdrm/omap_debugfs.c 	mutex_lock(&dev->mode_config.fb_lock);
mode_config        56 drivers/gpu/drm/omapdrm/omap_debugfs.c 	list_for_each_entry(fb, &dev->mode_config.fb_list, head) {
mode_config        63 drivers/gpu/drm/omapdrm/omap_debugfs.c 	mutex_unlock(&dev->mode_config.fb_lock);
mode_config       359 drivers/gpu/drm/omapdrm/omap_drv.c 	dev->mode_config.min_width = 8;
mode_config       360 drivers/gpu/drm/omapdrm/omap_drv.c 	dev->mode_config.min_height = 2;
mode_config       368 drivers/gpu/drm/omapdrm/omap_drv.c 	dev->mode_config.max_width = 8192;
mode_config       369 drivers/gpu/drm/omapdrm/omap_drv.c 	dev->mode_config.max_height = 8192;
mode_config       372 drivers/gpu/drm/omapdrm/omap_drv.c 	dev->mode_config.normalize_zpos = true;
mode_config       374 drivers/gpu/drm/omapdrm/omap_drv.c 	dev->mode_config.funcs = &omap_mode_config_funcs;
mode_config       375 drivers/gpu/drm/omapdrm/omap_drv.c 	dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
mode_config       109 drivers/gpu/drm/omapdrm/omap_encoder.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       179 drivers/gpu/drm/omapdrm/omap_fbdev.c 	dev->mode_config.fb_base = dma_addr;
mode_config        86 drivers/gpu/drm/pl111/pl111_drv.c 	struct drm_mode_config *mode_config;
mode_config        97 drivers/gpu/drm/pl111/pl111_drv.c 	mode_config = &dev->mode_config;
mode_config        98 drivers/gpu/drm/pl111/pl111_drv.c 	mode_config->funcs = &mode_config_funcs;
mode_config        99 drivers/gpu/drm/pl111/pl111_drv.c 	mode_config->min_width = 1;
mode_config       100 drivers/gpu/drm/pl111/pl111_drv.c 	mode_config->max_width = 1024;
mode_config       101 drivers/gpu/drm/pl111/pl111_drv.c 	mode_config->min_height = 1;
mode_config       102 drivers/gpu/drm/pl111/pl111_drv.c 	mode_config->max_height = 768;
mode_config       150 drivers/gpu/drm/qxl/qxl_display.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       156 drivers/gpu/drm/qxl/qxl_display.c 			dev->mode_config.suggested_x_property, head->x);
mode_config       158 drivers/gpu/drm/qxl/qxl_display.c 			dev->mode_config.suggested_y_property, head->y);
mode_config      1129 drivers/gpu/drm/qxl/qxl_display.c 				   dev->mode_config.suggested_x_property, 0);
mode_config      1131 drivers/gpu/drm/qxl/qxl_display.c 				   dev->mode_config.suggested_y_property, 0);
mode_config      1213 drivers/gpu/drm/qxl/qxl_display.c 	qdev->ddev.mode_config.funcs = (void *)&qxl_mode_funcs;
mode_config      1216 drivers/gpu/drm/qxl/qxl_display.c 	qdev->ddev.mode_config.min_width = 0;
mode_config      1217 drivers/gpu/drm/qxl/qxl_display.c 	qdev->ddev.mode_config.min_height = 0;
mode_config      1218 drivers/gpu/drm/qxl/qxl_display.c 	qdev->ddev.mode_config.max_width = 8192;
mode_config      1219 drivers/gpu/drm/qxl/qxl_display.c 	qdev->ddev.mode_config.max_height = 8192;
mode_config      1221 drivers/gpu/drm/qxl/qxl_display.c 	qdev->ddev.mode_config.fb_base = qdev->vram_base;
mode_config      1742 drivers/gpu/drm/radeon/atombios_crtc.c 	list_for_each_entry(test_crtc, &dev->mode_config.crtc_list, head) {
mode_config      1769 drivers/gpu/drm/radeon/atombios_crtc.c 	list_for_each_entry(test_crtc, &dev->mode_config.crtc_list, head) {
mode_config      1810 drivers/gpu/drm/radeon/atombios_crtc.c 	list_for_each_entry(test_crtc, &dev->mode_config.crtc_list, head) {
mode_config      2106 drivers/gpu/drm/radeon/atombios_crtc.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      2207 drivers/gpu/drm/radeon/atombios_encoders.c 	list_for_each_entry(test_encoder, &dev->mode_config.encoder_list, head) {
mode_config      2251 drivers/gpu/drm/radeon/atombios_encoders.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      2562 drivers/gpu/drm/radeon/atombios_encoders.c 		list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
mode_config      2735 drivers/gpu/drm/radeon/atombios_encoders.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config        92 drivers/gpu/drm/radeon/dce6_afmt.c 			list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) {
mode_config      1679 drivers/gpu/drm/radeon/evergreen.c 	list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {
mode_config      1704 drivers/gpu/drm/radeon/evergreen.c 	list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {
mode_config      1769 drivers/gpu/drm/radeon/evergreen.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config      1808 drivers/gpu/drm/radeon/evergreen.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       457 drivers/gpu/drm/radeon/r100.c 	list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {
mode_config       488 drivers/gpu/drm/radeon/r100.c 	list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {
mode_config       599 drivers/gpu/drm/radeon/r100.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       622 drivers/gpu/drm/radeon/r100.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       957 drivers/gpu/drm/radeon/r600.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config      1024 drivers/gpu/drm/radeon/r600.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       165 drivers/gpu/drm/radeon/r600_dpm.c 		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       191 drivers/gpu/drm/radeon/r600_dpm.c 		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       132 drivers/gpu/drm/radeon/r600_hdmi.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       742 drivers/gpu/drm/radeon/radeon_acpi.c 		list_for_each_entry(tmp, &rdev->ddev->mode_config.encoder_list,
mode_config       257 drivers/gpu/drm/radeon/radeon_audio.c 		list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) {
mode_config       429 drivers/gpu/drm/radeon/radeon_connectors.c 	list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
mode_config       713 drivers/gpu/drm/radeon/radeon_connectors.c 	if (property == dev->mode_config.scaling_mode_property) {
mode_config       950 drivers/gpu/drm/radeon/radeon_connectors.c 	if (property != dev->mode_config.scaling_mode_property)
mode_config      1325 drivers/gpu/drm/radeon/radeon_connectors.c 				list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
mode_config      1889 drivers/gpu/drm/radeon/radeon_connectors.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config      1909 drivers/gpu/drm/radeon/radeon_connectors.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      1970 drivers/gpu/drm/radeon/radeon_connectors.c 						   dev->mode_config.scaling_mode_property,
mode_config      1997 drivers/gpu/drm/radeon/radeon_connectors.c 						      dev->mode_config.scaling_mode_property,
mode_config      2035 drivers/gpu/drm/radeon/radeon_connectors.c 						      dev->mode_config.scaling_mode_property,
mode_config      2058 drivers/gpu/drm/radeon/radeon_connectors.c 							   dev->mode_config.scaling_mode_property,
mode_config      2083 drivers/gpu/drm/radeon/radeon_connectors.c 							   dev->mode_config.scaling_mode_property,
mode_config      2126 drivers/gpu/drm/radeon/radeon_connectors.c 							   dev->mode_config.scaling_mode_property,
mode_config      2182 drivers/gpu/drm/radeon/radeon_connectors.c 							   dev->mode_config.scaling_mode_property,
mode_config      2235 drivers/gpu/drm/radeon/radeon_connectors.c 							   dev->mode_config.scaling_mode_property,
mode_config      2268 drivers/gpu/drm/radeon/radeon_connectors.c 						      dev->mode_config.scaling_mode_property,
mode_config      2305 drivers/gpu/drm/radeon/radeon_connectors.c 						      dev->mode_config.scaling_mode_property,
mode_config      2360 drivers/gpu/drm/radeon/radeon_connectors.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config      2469 drivers/gpu/drm/radeon/radeon_connectors.c 					      dev->mode_config.scaling_mode_property,
mode_config      2501 drivers/gpu/drm/radeon/radeon_connectors.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       185 drivers/gpu/drm/radeon/radeon_cursor.c 		list_for_each_entry(crtc_p, &crtc->dev->mode_config.crtc_list, head) {
mode_config      1584 drivers/gpu/drm/radeon/radeon_device.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config      1590 drivers/gpu/drm/radeon/radeon_device.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config      1713 drivers/gpu/drm/radeon/radeon_device.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config      1752 drivers/gpu/drm/radeon/radeon_device.c 		list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       639 drivers/gpu/drm/radeon/radeon_display.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
mode_config       697 drivers/gpu/drm/radeon/radeon_display.c 	dev->mode_config.cursor_width = radeon_crtc->max_cursor_width;
mode_config       698 drivers/gpu/drm/radeon/radeon_display.c 	dev->mode_config.cursor_height = radeon_crtc->max_cursor_height;
mode_config       778 drivers/gpu/drm/radeon/radeon_display.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       812 drivers/gpu/drm/radeon/radeon_display.c 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      1585 drivers/gpu/drm/radeon/radeon_display.c 	rdev->ddev->mode_config.funcs = &radeon_mode_funcs;
mode_config      1588 drivers/gpu/drm/radeon/radeon_display.c 		rdev->ddev->mode_config.async_page_flip = true;
mode_config      1591 drivers/gpu/drm/radeon/radeon_display.c 		rdev->ddev->mode_config.max_width = 16384;
mode_config      1592 drivers/gpu/drm/radeon/radeon_display.c 		rdev->ddev->mode_config.max_height = 16384;
mode_config      1594 drivers/gpu/drm/radeon/radeon_display.c 		rdev->ddev->mode_config.max_width = 8192;
mode_config      1595 drivers/gpu/drm/radeon/radeon_display.c 		rdev->ddev->mode_config.max_height = 8192;
mode_config      1597 drivers/gpu/drm/radeon/radeon_display.c 		rdev->ddev->mode_config.max_width = 4096;
mode_config      1598 drivers/gpu/drm/radeon/radeon_display.c 		rdev->ddev->mode_config.max_height = 4096;
mode_config      1601 drivers/gpu/drm/radeon/radeon_display.c 	rdev->ddev->mode_config.preferred_depth = 24;
mode_config      1602 drivers/gpu/drm/radeon/radeon_display.c 	rdev->ddev->mode_config.prefer_shadow = 1;
mode_config      1604 drivers/gpu/drm/radeon/radeon_display.c 	rdev->ddev->mode_config.fb_base = rdev->mc.aper_base;
mode_config      1700 drivers/gpu/drm/radeon/radeon_display.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       124 drivers/gpu/drm/radeon/radeon_dp_mst.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       293 drivers/gpu/drm/radeon/radeon_dp_mst.c 	drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
mode_config       294 drivers/gpu/drm/radeon/radeon_dp_mst.c 	drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
mode_config       337 drivers/gpu/drm/radeon/radeon_dp_mst.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       759 drivers/gpu/drm/radeon/radeon_dp_mst.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       537 drivers/gpu/drm/radeon/radeon_drv.c 	list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
mode_config        63 drivers/gpu/drm/radeon/radeon_encoders.c 	list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) {
mode_config        83 drivers/gpu/drm/radeon/radeon_encoders.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       212 drivers/gpu/drm/radeon/radeon_encoders.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       214 drivers/gpu/drm/radeon/radeon_encoders.c 		list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       231 drivers/gpu/drm/radeon/radeon_encoders.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       250 drivers/gpu/drm/radeon/radeon_encoders.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       275 drivers/gpu/drm/radeon/radeon_encoders.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       293 drivers/gpu/drm/radeon/radeon_encoders.c 	list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
mode_config       277 drivers/gpu/drm/radeon/radeon_fb.c 	info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
mode_config       337 drivers/gpu/drm/radeon/radeon_fb.c 	if (list_empty(&rdev->ddev->mode_config.connector_list))
mode_config        86 drivers/gpu/drm/radeon/radeon_irq_kms.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config        94 drivers/gpu/drm/radeon/radeon_irq_kms.c 	mutex_lock(&mode_config->mutex);
mode_config        95 drivers/gpu/drm/radeon/radeon_irq_kms.c 	list_for_each_entry(connector, &mode_config->connector_list, head)
mode_config        97 drivers/gpu/drm/radeon/radeon_irq_kms.c 	mutex_unlock(&mode_config->mutex);
mode_config       107 drivers/gpu/drm/radeon/radeon_irq_kms.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config       111 drivers/gpu/drm/radeon/radeon_irq_kms.c 	list_for_each_entry(connector, &mode_config->connector_list, head)
mode_config       591 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       785 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      1070 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	list_for_each_entry(crtci, &dev->mode_config.crtc_list, head)
mode_config      1082 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	list_for_each_entry(crtci, &dev->mode_config.crtc_list, head) {
mode_config      1546 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config      1752 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      1660 drivers/gpu/drm/radeon/radeon_pm.c 				    &ddev->mode_config.crtc_list, head) {
mode_config      1734 drivers/gpu/drm/radeon/radeon_pm.c 				    &ddev->mode_config.crtc_list, head) {
mode_config       324 drivers/gpu/drm/radeon/rs600.c 	list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {
mode_config       342 drivers/gpu/drm/radeon/rs600.c 	list_for_each_entry(crtc, &ddev->mode_config.crtc_list, head) {
mode_config       409 drivers/gpu/drm/radeon/rs600.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       436 drivers/gpu/drm/radeon/rs600.c 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
mode_config       635 drivers/gpu/drm/rcar-du/rcar_du_kms.c 	dev->mode_config.min_width = 0;
mode_config       636 drivers/gpu/drm/rcar-du/rcar_du_kms.c 	dev->mode_config.min_height = 0;
mode_config       637 drivers/gpu/drm/rcar-du/rcar_du_kms.c 	dev->mode_config.normalize_zpos = true;
mode_config       638 drivers/gpu/drm/rcar-du/rcar_du_kms.c 	dev->mode_config.funcs = &rcar_du_mode_config_funcs;
mode_config       639 drivers/gpu/drm/rcar-du/rcar_du_kms.c 	dev->mode_config.helper_private = &rcar_du_mode_config_helper;
mode_config       642 drivers/gpu/drm/rcar-du/rcar_du_kms.c 		dev->mode_config.max_width = 4095;
mode_config       643 drivers/gpu/drm/rcar-du/rcar_du_kms.c 		dev->mode_config.max_height = 2047;
mode_config       649 drivers/gpu/drm/rcar-du/rcar_du_kms.c 		dev->mode_config.max_width = 8190;
mode_config       650 drivers/gpu/drm/rcar-du/rcar_du_kms.c 		dev->mode_config.max_height = 8190;
mode_config       739 drivers/gpu/drm/rcar-du/rcar_du_kms.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config        44 drivers/gpu/drm/rcar-du/rcar_du_writeback.c 	return drm_add_modes_noedid(connector, dev->mode_config.max_width,
mode_config        45 drivers/gpu/drm/rcar-du/rcar_du_writeback.c 				    dev->mode_config.max_height);
mode_config       147 drivers/gpu/drm/rockchip/rockchip_drm_drv.c 	ret = drm_vblank_init(drm_dev, drm_dev->mode_config.num_crtc);
mode_config       135 drivers/gpu/drm/rockchip/rockchip_drm_fb.c 	dev->mode_config.min_width = 0;
mode_config       136 drivers/gpu/drm/rockchip/rockchip_drm_fb.c 	dev->mode_config.min_height = 0;
mode_config       143 drivers/gpu/drm/rockchip/rockchip_drm_fb.c 	dev->mode_config.max_width = 4096;
mode_config       144 drivers/gpu/drm/rockchip/rockchip_drm_fb.c 	dev->mode_config.max_height = 4096;
mode_config       146 drivers/gpu/drm/rockchip/rockchip_drm_fb.c 	dev->mode_config.funcs = &rockchip_drm_mode_config_funcs;
mode_config       147 drivers/gpu/drm/rockchip/rockchip_drm_fb.c 	dev->mode_config.helper_private = &rockchip_mode_config_helpers;
mode_config        93 drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c 	dev->mode_config.fb_base = 0;
mode_config       120 drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c 	if (!dev->mode_config.num_crtc || !dev->mode_config.num_connector)
mode_config      1606 drivers/gpu/drm/rockchip/rockchip_drm_vop.c 	list_for_each_entry_safe(plane, tmp, &drm_dev->mode_config.plane_list,
mode_config      1630 drivers/gpu/drm/rockchip/rockchip_drm_vop.c 	list_for_each_entry_safe(plane, tmp, &drm_dev->mode_config.plane_list,
mode_config       320 drivers/gpu/drm/selftests/test-drm_framebuffer.c 	.mode_config = {
mode_config       682 drivers/gpu/drm/shmobile/shmob_drm_crtc.c 		sdev->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
mode_config       137 drivers/gpu/drm/shmobile/shmob_drm_kms.c 	sdev->ddev->mode_config.min_width = 0;
mode_config       138 drivers/gpu/drm/shmobile/shmob_drm_kms.c 	sdev->ddev->mode_config.min_height = 0;
mode_config       139 drivers/gpu/drm/shmobile/shmob_drm_kms.c 	sdev->ddev->mode_config.max_width = 4095;
mode_config       140 drivers/gpu/drm/shmobile/shmob_drm_kms.c 	sdev->ddev->mode_config.max_height = 4095;
mode_config       141 drivers/gpu/drm/shmobile/shmob_drm_kms.c 	sdev->ddev->mode_config.funcs = &shmob_drm_mode_config_funcs;
mode_config       148 drivers/gpu/drm/sti/sti_crtc.c 	list_for_each_entry(p, &drm_dev->mode_config.plane_list, head) {
mode_config       268 drivers/gpu/drm/sti/sti_crtc.c 		list_for_each_entry(p, &crtc->dev->mode_config.plane_list,
mode_config        44 drivers/gpu/drm/sti/sti_drv.c 	list_for_each_entry(p, &drm_dev->mode_config.plane_list, head) {
mode_config        60 drivers/gpu/drm/sti/sti_drv.c 	list_for_each_entry(p, &drm_dev->mode_config.plane_list, head) {
mode_config        81 drivers/gpu/drm/sti/sti_drv.c 	list_for_each_entry(p, &dev->mode_config.plane_list, head) {
mode_config       124 drivers/gpu/drm/sti/sti_drv.c 	dev->mode_config.min_width = 0;
mode_config       125 drivers/gpu/drm/sti/sti_drv.c 	dev->mode_config.min_height = 0;
mode_config       132 drivers/gpu/drm/sti/sti_drv.c 	dev->mode_config.max_width = STI_MAX_FB_WIDTH;
mode_config       133 drivers/gpu/drm/sti/sti_drv.c 	dev->mode_config.max_height = STI_MAX_FB_HEIGHT;
mode_config       135 drivers/gpu/drm/sti/sti_drv.c 	dev->mode_config.funcs = &sti_mode_config_funcs;
mode_config       137 drivers/gpu/drm/sti/sti_drv.c 	dev->mode_config.normalize_zpos = true;
mode_config       429 drivers/gpu/drm/sti/sti_dvo.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       666 drivers/gpu/drm/sti/sti_hda.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config      1139 drivers/gpu/drm/sti/sti_hdmi.c 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
mode_config       100 drivers/gpu/drm/stm/drv.c 	ddev->mode_config.min_width = 0;
mode_config       101 drivers/gpu/drm/stm/drv.c 	ddev->mode_config.min_height = 0;
mode_config       102 drivers/gpu/drm/stm/drv.c 	ddev->mode_config.max_width = STM_MAX_FB_WIDTH;
mode_config       103 drivers/gpu/drm/stm/drv.c 	ddev->mode_config.max_height = STM_MAX_FB_HEIGHT;
mode_config       104 drivers/gpu/drm/stm/drv.c 	ddev->mode_config.funcs = &drv_mode_config_funcs;
mode_config       987 drivers/gpu/drm/stm/ltdc.c 				 &ddev->mode_config.plane_list, head)
mode_config      1264 drivers/gpu/drm/stm/ltdc.c 	ddev->mode_config.allow_fb_modifiers = true;
mode_config        96 drivers/gpu/drm/sun4i/sun4i_drv.c 	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
mode_config        46 drivers/gpu/drm/sun4i/sun4i_framebuffer.c 	drm->mode_config.max_width = 8192;
mode_config        47 drivers/gpu/drm/sun4i/sun4i_framebuffer.c 	drm->mode_config.max_height = 8192;
mode_config        49 drivers/gpu/drm/sun4i/sun4i_framebuffer.c 	drm->mode_config.funcs = &sun4i_de_mode_config_funcs;
mode_config        50 drivers/gpu/drm/sun4i/sun4i_framebuffer.c 	drm->mode_config.helper_private = &sun4i_de_mode_config_helpers;
mode_config       754 drivers/gpu/drm/tegra/dc.c 	return 1 << drm->mode_config.num_crtc;
mode_config       119 drivers/gpu/drm/tegra/drm.c 	drm->mode_config.min_width = 0;
mode_config       120 drivers/gpu/drm/tegra/drm.c 	drm->mode_config.min_height = 0;
mode_config       122 drivers/gpu/drm/tegra/drm.c 	drm->mode_config.max_width = 4096;
mode_config       123 drivers/gpu/drm/tegra/drm.c 	drm->mode_config.max_height = 4096;
mode_config       125 drivers/gpu/drm/tegra/drm.c 	drm->mode_config.allow_fb_modifiers = true;
mode_config       127 drivers/gpu/drm/tegra/drm.c 	drm->mode_config.normalize_zpos = true;
mode_config       129 drivers/gpu/drm/tegra/drm.c 	drm->mode_config.funcs = &tegra_drm_mode_config_funcs;
mode_config       130 drivers/gpu/drm/tegra/drm.c 	drm->mode_config.helper_private = &tegra_drm_mode_config_helpers;
mode_config       188 drivers/gpu/drm/tegra/drm.c 	err = drm_vblank_init(drm, drm->mode_config.num_crtc);
mode_config       970 drivers/gpu/drm/tegra/drm.c 	mutex_lock(&drm->mode_config.fb_lock);
mode_config       972 drivers/gpu/drm/tegra/drm.c 	list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
mode_config       980 drivers/gpu/drm/tegra/drm.c 	mutex_unlock(&drm->mode_config.fb_lock);
mode_config       272 drivers/gpu/drm/tegra/fb.c 	drm->mode_config.fb_base = (resource_size_t)bo->paddr;
mode_config       393 drivers/gpu/drm/tegra/fb.c 	err = tegra_fbdev_init(tegra->fbdev, 32, drm->mode_config.num_crtc,
mode_config       394 drivers/gpu/drm/tegra/fb.c 			       drm->mode_config.num_connector);
mode_config       611 drivers/gpu/drm/tegra/hub.c 	WARN_ON(!drm_modeset_is_locked(&drm->mode_config.connection_mutex));
mode_config       158 drivers/gpu/drm/tilcdc/tilcdc_drv.c 	dev->mode_config.min_width = 0;
mode_config       159 drivers/gpu/drm/tilcdc/tilcdc_drv.c 	dev->mode_config.min_height = 0;
mode_config       160 drivers/gpu/drm/tilcdc/tilcdc_drv.c 	dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
mode_config       161 drivers/gpu/drm/tilcdc/tilcdc_drv.c 	dev->mode_config.max_height = 2048;
mode_config       162 drivers/gpu/drm/tilcdc/tilcdc_drv.c 	dev->mode_config.funcs = &mode_config_funcs;
mode_config        47 drivers/gpu/drm/tilcdc/tilcdc_external.c 	list_for_each_entry(connector, &ddev->mode_config.connector_list, head) {
mode_config        63 drivers/gpu/drm/tilcdc/tilcdc_external.c 	list_for_each_entry(encoder, &ddev->mode_config.encoder_list, head)
mode_config       706 drivers/gpu/drm/tiny/gm12u320.c 	dev->mode_config.min_width = GM12U320_USER_WIDTH;
mode_config       707 drivers/gpu/drm/tiny/gm12u320.c 	dev->mode_config.max_width = GM12U320_USER_WIDTH;
mode_config       708 drivers/gpu/drm/tiny/gm12u320.c 	dev->mode_config.min_height = GM12U320_HEIGHT;
mode_config       709 drivers/gpu/drm/tiny/gm12u320.c 	dev->mode_config.max_height = GM12U320_HEIGHT;
mode_config       710 drivers/gpu/drm/tiny/gm12u320.c 	dev->mode_config.funcs = &gm12u320_mode_config_funcs;
mode_config      1037 drivers/gpu/drm/tiny/repaper.c 	drm->mode_config.funcs = &repaper_mode_config_funcs;
mode_config      1150 drivers/gpu/drm/tiny/repaper.c 	drm->mode_config.min_width = mode->hdisplay;
mode_config      1151 drivers/gpu/drm/tiny/repaper.c 	drm->mode_config.max_width = mode->hdisplay;
mode_config      1152 drivers/gpu/drm/tiny/repaper.c 	drm->mode_config.min_height = mode->vdisplay;
mode_config      1153 drivers/gpu/drm/tiny/repaper.c 	drm->mode_config.max_height = mode->vdisplay;
mode_config        64 drivers/gpu/drm/tve200/tve200_drv.c 	struct drm_mode_config *mode_config;
mode_config        71 drivers/gpu/drm/tve200/tve200_drv.c 	mode_config = &dev->mode_config;
mode_config        72 drivers/gpu/drm/tve200/tve200_drv.c 	mode_config->funcs = &mode_config_funcs;
mode_config        73 drivers/gpu/drm/tve200/tve200_drv.c 	mode_config->min_width = 352;
mode_config        74 drivers/gpu/drm/tve200/tve200_drv.c 	mode_config->max_width = 720;
mode_config        75 drivers/gpu/drm/tve200/tve200_drv.c 	mode_config->min_height = 240;
mode_config        76 drivers/gpu/drm/tve200/tve200_drv.c 	mode_config->max_height = 576;
mode_config       433 drivers/gpu/drm/udl/udl_modeset.c 	dev->mode_config.min_width = 640;
mode_config       434 drivers/gpu/drm/udl/udl_modeset.c 	dev->mode_config.min_height = 480;
mode_config       436 drivers/gpu/drm/udl/udl_modeset.c 	dev->mode_config.max_width = 2048;
mode_config       437 drivers/gpu/drm/udl/udl_modeset.c 	dev->mode_config.max_height = 2048;
mode_config       439 drivers/gpu/drm/udl/udl_modeset.c 	dev->mode_config.prefer_shadow = 0;
mode_config       440 drivers/gpu/drm/udl/udl_modeset.c 	dev->mode_config.preferred_depth = 24;
mode_config       442 drivers/gpu/drm/udl/udl_modeset.c 	dev->mode_config.funcs = &udl_mode_funcs;
mode_config       127 drivers/gpu/drm/vboxvideo/vbox_irq.c 	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mode_config       159 drivers/gpu/drm/vboxvideo/vbox_irq.c 	drm_modeset_unlock(&dev->mode_config.connection_mutex);
mode_config        53 drivers/gpu/drm/vboxvideo/vbox_main.c 	list_for_each_entry(crtc, &fb->dev->mode_config.crtc_list, head) {
mode_config       129 drivers/gpu/drm/vboxvideo/vbox_mode.c 	list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list, head) {
mode_config       152 drivers/gpu/drm/vboxvideo/vbox_mode.c 	list_for_each_entry(connectori, &vbox->ddev.mode_config.connector_list,
mode_config       196 drivers/gpu/drm/vboxvideo/vbox_mode.c 		list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list,
mode_config       450 drivers/gpu/drm/vboxvideo/vbox_mode.c 	list_for_each_entry(crtci, &vbox->ddev.mode_config.crtc_list, head) {
mode_config       762 drivers/gpu/drm/vboxvideo/vbox_mode.c 			vbox->ddev.mode_config.suggested_x_property,
mode_config       766 drivers/gpu/drm/vboxvideo/vbox_mode.c 			vbox->ddev.mode_config.suggested_x_property, 0);
mode_config       770 drivers/gpu/drm/vboxvideo/vbox_mode.c 			vbox->ddev.mode_config.suggested_y_property,
mode_config       774 drivers/gpu/drm/vboxvideo/vbox_mode.c 			vbox->ddev.mode_config.suggested_y_property, 0);
mode_config       850 drivers/gpu/drm/vboxvideo/vbox_mode.c 				   dev->mode_config.suggested_x_property, 0);
mode_config       852 drivers/gpu/drm/vboxvideo/vbox_mode.c 				   dev->mode_config.suggested_y_property, 0);
mode_config       907 drivers/gpu/drm/vboxvideo/vbox_mode.c 	dev->mode_config.funcs = (void *)&vbox_mode_funcs;
mode_config       908 drivers/gpu/drm/vboxvideo/vbox_mode.c 	dev->mode_config.min_width = 0;
mode_config       909 drivers/gpu/drm/vboxvideo/vbox_mode.c 	dev->mode_config.min_height = 0;
mode_config       910 drivers/gpu/drm/vboxvideo/vbox_mode.c 	dev->mode_config.preferred_depth = 24;
mode_config       911 drivers/gpu/drm/vboxvideo/vbox_mode.c 	dev->mode_config.max_width = VBE_DISPI_MAX_XRES;
mode_config       912 drivers/gpu/drm/vboxvideo/vbox_mode.c 	dev->mode_config.max_height = VBE_DISPI_MAX_YRES;
mode_config      1233 drivers/gpu/drm/vc4/vc4_crtc.c 				 &drm->mode_config.plane_list, head) {
mode_config       155 drivers/gpu/drm/vc4/vc4_kms.c 	for (i = 0; i < dev->mode_config.num_crtc; i++) {
mode_config       528 drivers/gpu/drm/vc4/vc4_kms.c 	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
mode_config       534 drivers/gpu/drm/vc4/vc4_kms.c 	dev->mode_config.max_width = 2048;
mode_config       535 drivers/gpu/drm/vc4/vc4_kms.c 	dev->mode_config.max_height = 2048;
mode_config       536 drivers/gpu/drm/vc4/vc4_kms.c 	dev->mode_config.funcs = &vc4_mode_funcs;
mode_config       537 drivers/gpu/drm/vc4/vc4_kms.c 	dev->mode_config.preferred_depth = 24;
mode_config       538 drivers/gpu/drm/vc4/vc4_kms.c 	dev->mode_config.async_page_flip = true;
mode_config       539 drivers/gpu/drm/vc4/vc4_kms.c 	dev->mode_config.allow_fb_modifiers = true;
mode_config       178 drivers/gpu/drm/vc4/vc4_txp.c 	return drm_add_modes_noedid(connector, dev->mode_config.max_width,
mode_config       179 drivers/gpu/drm/vc4/vc4_txp.c 				    dev->mode_config.max_height);
mode_config       187 drivers/gpu/drm/vc4/vc4_txp.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config       190 drivers/gpu/drm/vc4/vc4_txp.c 	if (w < mode_config->min_width || w > mode_config->max_width)
mode_config       193 drivers/gpu/drm/vc4/vc4_txp.c 	if (h < mode_config->min_height || h > mode_config->max_height)
mode_config       368 drivers/gpu/drm/vc4/vc4_vec.c 				   dev->mode_config.tv_mode_property,
mode_config       353 drivers/gpu/drm/virtio/virtgpu_display.c 	vgdev->ddev->mode_config.quirk_addfb_prefer_host_byte_order = true;
mode_config       354 drivers/gpu/drm/virtio/virtgpu_display.c 	vgdev->ddev->mode_config.funcs = &virtio_gpu_mode_funcs;
mode_config       355 drivers/gpu/drm/virtio/virtgpu_display.c 	vgdev->ddev->mode_config.helper_private = &virtio_mode_config_helpers;
mode_config       358 drivers/gpu/drm/virtio/virtgpu_display.c 	vgdev->ddev->mode_config.min_width = XRES_MIN;
mode_config       359 drivers/gpu/drm/virtio/virtgpu_display.c 	vgdev->ddev->mode_config.min_height = YRES_MIN;
mode_config       360 drivers/gpu/drm/virtio/virtgpu_display.c 	vgdev->ddev->mode_config.max_width = XRES_MAX;
mode_config       361 drivers/gpu/drm/virtio/virtgpu_display.c 	vgdev->ddev->mode_config.max_height = YRES_MAX;
mode_config       129 drivers/gpu/drm/vkms/vkms_drv.c 	dev->mode_config.funcs = &vkms_mode_funcs;
mode_config       130 drivers/gpu/drm/vkms/vkms_drv.c 	dev->mode_config.min_width = XRES_MIN;
mode_config       131 drivers/gpu/drm/vkms/vkms_drv.c 	dev->mode_config.min_height = YRES_MIN;
mode_config       132 drivers/gpu/drm/vkms/vkms_drv.c 	dev->mode_config.max_width = XRES_MAX;
mode_config       133 drivers/gpu/drm/vkms/vkms_drv.c 	dev->mode_config.max_height = YRES_MAX;
mode_config       134 drivers/gpu/drm/vkms/vkms_drv.c 	dev->mode_config.preferred_depth = 24;
mode_config       135 drivers/gpu/drm/vkms/vkms_drv.c 	dev->mode_config.helper_private = &vkms_mode_config_helpers;
mode_config       259 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	mutex_lock(&dev->mode_config.mutex);
mode_config       261 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config       275 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config      1610 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	rects = kcalloc(dev->mode_config.num_crtc, sizeof(struct drm_rect),
mode_config      1674 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	ret = vmw_kms_check_display_memory(dev, dev->mode_config.num_crtc,
mode_config      1804 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	dev->mode_config.funcs = &vmw_kms_funcs;
mode_config      1805 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	dev->mode_config.min_width = 1;
mode_config      1806 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	dev->mode_config.min_height = 1;
mode_config      1807 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	dev->mode_config.max_width = dev_priv->texture_max_width;
mode_config      1808 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	dev->mode_config.max_height = dev_priv->texture_max_height;
mode_config      1848 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	mutex_lock(&dev->mode_config.mutex);
mode_config      1851 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
mode_config      1857 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 		mutex_unlock(&dev->mode_config.mutex);
mode_config      1873 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config      2033 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	mutex_lock(&dev->mode_config.mutex);
mode_config      2066 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	list_for_each_entry(con, &dev->mode_config.connector_list, head) {
mode_config      2070 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 			  (&con->base, dev->mode_config.suggested_x_property,
mode_config      2073 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 			  (&con->base, dev->mode_config.suggested_y_property,
mode_config      2077 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 			  (&con->base, dev->mode_config.suggested_x_property,
mode_config      2080 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 			  (&con->base, dev->mode_config.suggested_y_property,
mode_config      2090 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	mutex_unlock(&dev->mode_config.mutex);
mode_config      2338 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	struct drm_mode_config *mode_config = &dev->mode_config;
mode_config      2401 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 		    drm_rects[i].x2 > mode_config->max_width ||
mode_config      2402 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 		    drm_rects[i].y2 > mode_config->max_height) {
mode_config      2458 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 		list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
mode_config      2660 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	mutex_lock(&dev_priv->dev->mode_config.mutex);
mode_config      2661 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	list_for_each_entry(con, &dev_priv->dev->mode_config.connector_list,
mode_config      2703 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 	mutex_unlock(&dev_priv->dev->mode_config.mutex);
mode_config       462 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c 				   dev->mode_config.suggested_x_property, 0);
mode_config       464 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c 				   dev->mode_config.suggested_y_property, 0);
mode_config       935 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c 				   dev->mode_config.suggested_x_property, 0);
mode_config       937 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c 				   dev->mode_config.suggested_y_property, 0);
mode_config      1829 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c 				   dev->mode_config.suggested_x_property, 0);
mode_config      1831 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c 				   dev->mode_config.suggested_y_property, 0);
mode_config       331 drivers/gpu/drm/xen/xen_drm_front_kms.c 	dev->mode_config.min_width = 0;
mode_config       332 drivers/gpu/drm/xen/xen_drm_front_kms.c 	dev->mode_config.min_height = 0;
mode_config       333 drivers/gpu/drm/xen/xen_drm_front_kms.c 	dev->mode_config.max_width = 4095;
mode_config       334 drivers/gpu/drm/xen/xen_drm_front_kms.c 	dev->mode_config.max_height = 2047;
mode_config       335 drivers/gpu/drm/xen/xen_drm_front_kms.c 	dev->mode_config.funcs = &mode_config_funcs;
mode_config        69 drivers/gpu/drm/zte/zx_drm_drv.c 	drm->mode_config.min_width = 16;
mode_config        70 drivers/gpu/drm/zte/zx_drm_drv.c 	drm->mode_config.min_height = 16;
mode_config        71 drivers/gpu/drm/zte/zx_drm_drv.c 	drm->mode_config.max_width = 4096;
mode_config        72 drivers/gpu/drm/zte/zx_drm_drv.c 	drm->mode_config.max_height = 4096;
mode_config        73 drivers/gpu/drm/zte/zx_drm_drv.c 	drm->mode_config.funcs = &zx_drm_mode_config_funcs;
mode_config        81 drivers/gpu/drm/zte/zx_drm_drv.c 	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
mode_config       230 drivers/media/i2c/adv7343.c 		val = state->pdata->mode_config.sleep_mode << 0 |
mode_config       231 drivers/media/i2c/adv7343.c 		      state->pdata->mode_config.pll_control << 1 |
mode_config       232 drivers/media/i2c/adv7343.c 		      state->pdata->mode_config.dac[2] << 2 |
mode_config       233 drivers/media/i2c/adv7343.c 		      state->pdata->mode_config.dac[1] << 3 |
mode_config       234 drivers/media/i2c/adv7343.c 		      state->pdata->mode_config.dac[0] << 4 |
mode_config       235 drivers/media/i2c/adv7343.c 		      state->pdata->mode_config.dac[5] << 5 |
mode_config       236 drivers/media/i2c/adv7343.c 		      state->pdata->mode_config.dac[4] << 6 |
mode_config       237 drivers/media/i2c/adv7343.c 		      state->pdata->mode_config.dac[3] << 7;
mode_config       414 drivers/media/i2c/adv7343.c 	pdata->mode_config.sleep_mode =
mode_config       417 drivers/media/i2c/adv7343.c 	pdata->mode_config.pll_control =
mode_config       421 drivers/media/i2c/adv7343.c 				   pdata->mode_config.dac, 6);
mode_config       279 include/drm/drm_atomic.h 	list_for_each_entry(privobj, &(dev)->mode_config.privobj_list, head)
mode_config       753 include/drm/drm_atomic.h 	     (__i) < (__state)->dev->mode_config.num_crtc;		\
mode_config       773 include/drm/drm_atomic.h 	     (__i) < (__state)->dev->mode_config.num_crtc;		\
mode_config       792 include/drm/drm_atomic.h 	     (__i) < (__state)->dev->mode_config.num_crtc;		\
mode_config       812 include/drm/drm_atomic.h 	     (__i) < (__state)->dev->mode_config.num_total_plane;	\
mode_config       833 include/drm/drm_atomic.h 	for ((__i) = ((__state)->dev->mode_config.num_total_plane - 1);	\
mode_config       854 include/drm/drm_atomic.h 	     (__i) < (__state)->dev->mode_config.num_total_plane;	\
mode_config       872 include/drm/drm_atomic.h 	     (__i) < (__state)->dev->mode_config.num_total_plane;	\
mode_config      1206 include/drm/drm_crtc.h 	list_for_each_entry(crtc, &(dev)->mode_config.crtc_list, head)
mode_config       279 include/drm/drm_device.h 	struct drm_mode_config mode_config;
mode_config       854 include/drm/drm_drv.h 		(dev->mode_config.funcs && dev->mode_config.funcs->atomic_commit != NULL);
mode_config       256 include/drm/drm_encoder.h 	list_for_each_entry((encoder), &(dev)->mode_config.encoder_list, head) \
mode_config       267 include/drm/drm_encoder.h 	list_for_each_entry(encoder, &(dev)->mode_config.encoder_list, head)
mode_config       289 include/drm/drm_framebuffer.h 	for (WARN_ON(!mutex_is_locked(&(dev)->mode_config.fb_lock)),		\
mode_config       290 include/drm/drm_framebuffer.h 	     fb = list_first_entry(&(dev)->mode_config.fb_list,	\
mode_config       292 include/drm/drm_framebuffer.h 	     &fb->head != (&(dev)->mode_config.fb_list);			\
mode_config       785 include/drm/drm_plane.h 	list_for_each_entry((plane), &(dev)->mode_config.plane_list, head) \
mode_config       798 include/drm/drm_plane.h 	list_for_each_entry(plane, &(dev)->mode_config.plane_list, head) \
mode_config       809 include/drm/drm_plane.h 	list_for_each_entry(plane, &(dev)->mode_config.plane_list, head)
mode_config        59 include/media/i2c/adv7343.h 	struct adv7343_power_mode mode_config;