mode_422 673 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c bool mode_422 = 0; mode_422 678 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c unsigned int ppe = mode_422 ? 2 : 1; mode_422 810 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c bool mode_422; mode_422 962 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c mode_422 = 0; // FIXME mode_422 1139 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c if (mode_422) { mode_422 673 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c bool mode_422 = 0; mode_422 678 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c unsigned int ppe = mode_422 ? 2 : 1; mode_422 810 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c bool mode_422; mode_422 962 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c mode_422 = 0; // FIXME mode_422 1139 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c if (mode_422) { mode_422 683 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c bool mode_422 = 0; mode_422 688 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c unsigned int ppe = mode_422 ? 2 : 1; mode_422 857 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c bool mode_422; mode_422 1014 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c mode_422 = 0; // FIXME mode_422 1191 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c if (mode_422) { mode_422 544 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c bool mode_422 = 0; mode_422 549 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c unsigned int ppe = mode_422 ? 2 : 1; mode_422 1013 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c bool mode_422; mode_422 1185 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c mode_422 = 0; /* FIXME */ mode_422 1577 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c if (mode_422) {