mode1 232 arch/mips/cavium-octeon/executive/cvmx-helper-util.c pko_mode.s.mode1 = 4; mode1 234 arch/mips/cavium-octeon/executive/cvmx-helper-util.c pko_mode.s.mode1 = 3; mode1 236 arch/mips/cavium-octeon/executive/cvmx-helper-util.c pko_mode.s.mode1 = 2; mode1 238 arch/mips/cavium-octeon/executive/cvmx-helper-util.c pko_mode.s.mode1 = 1; mode1 240 arch/mips/cavium-octeon/executive/cvmx-helper-util.c pko_mode.s.mode1 = 0; mode1 1944 arch/mips/include/asm/octeon/cvmx-pko-defs.h uint64_t mode1:3; mode1 1948 arch/mips/include/asm/octeon/cvmx-pko-defs.h uint64_t mode1:3; mode1 311 drivers/block/swim.c swim_write(base, mode1, INTERNAL_DRIVE); /* set drive 0 bit */ mode1 314 drivers/block/swim.c swim_write(base, mode1, EXTERNAL_DRIVE); /* set drive 1 bit */ mode1 467 drivers/block/swim.c swim_write(base, mode1, MOTON); mode1 1056 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c struct drm_display_mode *mode1 = NULL; mode1 1071 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c mode1 = &adev->mode_info.crtcs[i+1]->base.mode; mode1 1072 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode0, mode1); mode1 1074 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i+1], mode1, mode0); mode1 950 drivers/gpu/drm/drm_modes.c static bool drm_mode_match_timings(const struct drm_display_mode *mode1, mode1 953 drivers/gpu/drm/drm_modes.c return mode1->hdisplay == mode2->hdisplay && mode1 954 drivers/gpu/drm/drm_modes.c mode1->hsync_start == mode2->hsync_start && mode1 955 drivers/gpu/drm/drm_modes.c mode1->hsync_end == mode2->hsync_end && mode1 956 drivers/gpu/drm/drm_modes.c mode1->htotal == mode2->htotal && mode1 957 drivers/gpu/drm/drm_modes.c mode1->hskew == mode2->hskew && mode1 958 drivers/gpu/drm/drm_modes.c mode1->vdisplay == mode2->vdisplay && mode1 959 drivers/gpu/drm/drm_modes.c mode1->vsync_start == mode2->vsync_start && mode1 960 drivers/gpu/drm/drm_modes.c mode1->vsync_end == mode2->vsync_end && mode1 961 drivers/gpu/drm/drm_modes.c mode1->vtotal == mode2->vtotal && mode1 962 drivers/gpu/drm/drm_modes.c mode1->vscan == mode2->vscan; mode1 965 drivers/gpu/drm/drm_modes.c static bool drm_mode_match_clock(const struct drm_display_mode *mode1, mode1 972 drivers/gpu/drm/drm_modes.c if (mode1->clock && mode2->clock) mode1 973 drivers/gpu/drm/drm_modes.c return KHZ2PICOS(mode1->clock) == KHZ2PICOS(mode2->clock); mode1 975 drivers/gpu/drm/drm_modes.c return mode1->clock == mode2->clock; mode1 978 drivers/gpu/drm/drm_modes.c static bool drm_mode_match_flags(const struct drm_display_mode *mode1, mode1 981 drivers/gpu/drm/drm_modes.c return (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) == mode1 985 drivers/gpu/drm/drm_modes.c static bool drm_mode_match_3d_flags(const struct drm_display_mode *mode1, mode1 988 drivers/gpu/drm/drm_modes.c return (mode1->flags & DRM_MODE_FLAG_3D_MASK) == mode1 992 drivers/gpu/drm/drm_modes.c static bool drm_mode_match_aspect_ratio(const struct drm_display_mode *mode1, mode1 995 drivers/gpu/drm/drm_modes.c return mode1->picture_aspect_ratio == mode2->picture_aspect_ratio; mode1 1009 drivers/gpu/drm/drm_modes.c bool drm_mode_match(const struct drm_display_mode *mode1, mode1 1013 drivers/gpu/drm/drm_modes.c if (!mode1 && !mode2) mode1 1016 drivers/gpu/drm/drm_modes.c if (!mode1 || !mode2) mode1 1020 drivers/gpu/drm/drm_modes.c !drm_mode_match_timings(mode1, mode2)) mode1 1024 drivers/gpu/drm/drm_modes.c !drm_mode_match_clock(mode1, mode2)) mode1 1028 drivers/gpu/drm/drm_modes.c !drm_mode_match_flags(mode1, mode2)) mode1 1032 drivers/gpu/drm/drm_modes.c !drm_mode_match_3d_flags(mode1, mode2)) mode1 1036 drivers/gpu/drm/drm_modes.c !drm_mode_match_aspect_ratio(mode1, mode2)) mode1 1053 drivers/gpu/drm/drm_modes.c bool drm_mode_equal(const struct drm_display_mode *mode1, mode1 1056 drivers/gpu/drm/drm_modes.c return drm_mode_match(mode1, mode2, mode1 1076 drivers/gpu/drm/drm_modes.c bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, mode1 1079 drivers/gpu/drm/drm_modes.c return drm_mode_match(mode1, mode2, mode1 1097 drivers/gpu/drm/drm_modes.c bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, mode1 1100 drivers/gpu/drm/drm_modes.c return drm_mode_match(mode1, mode2, mode1 2324 drivers/gpu/drm/radeon/evergreen.c struct drm_display_mode *mode1 = NULL; mode1 2339 drivers/gpu/drm/radeon/evergreen.c mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; mode1 2340 drivers/gpu/drm/radeon/evergreen.c lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); mode1 2342 drivers/gpu/drm/radeon/evergreen.c lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); mode1 3214 drivers/gpu/drm/radeon/r100.c struct drm_display_mode *mode1 = NULL; mode1 3231 drivers/gpu/drm/radeon/r100.c mode1 = &rdev->mode_info.crtcs[0]->base.mode; mode1 3253 drivers/gpu/drm/radeon/r100.c if (mode1) mode1 3271 drivers/gpu/drm/radeon/r100.c if (mode1) { mode1 3273 drivers/gpu/drm/radeon/r100.c pix_clk.full = dfixed_const(mode1->clock); /* convert to fixed point */ mode1 3465 drivers/gpu/drm/radeon/r100.c if (mode1) { mode1 3470 drivers/gpu/drm/radeon/r100.c stop_req = mode1->hdisplay * pixel_bytes1 / 16; mode1 3587 drivers/gpu/drm/radeon/r100.c if (mode1) { mode1 3644 drivers/gpu/drm/radeon/r100.c if (mode1) mode1 3645 drivers/gpu/drm/radeon/r100.c rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); mode1 270 drivers/gpu/drm/radeon/radeon_asic.h struct drm_display_mode *mode1, mode1 896 drivers/gpu/drm/radeon/rs600.c struct drm_display_mode *mode1 = NULL; mode1 908 drivers/gpu/drm/radeon/rs600.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; mode1 910 drivers/gpu/drm/radeon/rs600.c rs690_line_buffer_adjust(rdev, mode0, mode1); mode1 206 drivers/gpu/drm/radeon/rs690.c struct drm_display_mode *mode1, mode1 231 drivers/gpu/drm/radeon/rs690.c if (mode1 && mode2) { mode1 232 drivers/gpu/drm/radeon/rs690.c if (mode1->hdisplay > mode2->hdisplay) { mode1 233 drivers/gpu/drm/radeon/rs690.c if (mode1->hdisplay > 2560) mode1 237 drivers/gpu/drm/radeon/rs690.c } else if (mode2->hdisplay > mode1->hdisplay) { mode1 244 drivers/gpu/drm/radeon/rs690.c } else if (mode1) { mode1 252 drivers/gpu/drm/radeon/rs690.c if (mode1) mode1 253 drivers/gpu/drm/radeon/rs690.c rdev->mode_info.crtcs[0]->lb_vblank_lead_lines = DIV_ROUND_UP(lb_size, mode1->crtc_hdisplay); mode1 464 drivers/gpu/drm/radeon/rs690.c struct drm_display_mode *mode1, mode1 474 drivers/gpu/drm/radeon/rs690.c if (mode0 && mode1) { mode1 554 drivers/gpu/drm/radeon/rs690.c } else if (mode1) { mode1 587 drivers/gpu/drm/radeon/rs690.c struct drm_display_mode *mode1 = NULL; mode1 602 drivers/gpu/drm/radeon/rs690.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; mode1 615 drivers/gpu/drm/radeon/rs690.c if (mode1) mode1 619 drivers/gpu/drm/radeon/rs690.c rs690_line_buffer_adjust(rdev, mode0, mode1); mode1 638 drivers/gpu/drm/radeon/rs690.c mode0, mode1, mode1 642 drivers/gpu/drm/radeon/rs690.c mode0, mode1, mode1 1115 drivers/gpu/drm/radeon/rv515.c struct drm_display_mode *mode1, mode1 1125 drivers/gpu/drm/radeon/rv515.c if (mode0 && mode1) { mode1 1205 drivers/gpu/drm/radeon/rv515.c } else if (mode1) { mode1 1238 drivers/gpu/drm/radeon/rv515.c struct drm_display_mode *mode1 = NULL; mode1 1248 drivers/gpu/drm/radeon/rv515.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; mode1 1249 drivers/gpu/drm/radeon/rv515.c rs690_line_buffer_adjust(rdev, mode0, mode1); mode1 1263 drivers/gpu/drm/radeon/rv515.c mode0, mode1, mode1 1267 drivers/gpu/drm/radeon/rv515.c mode0, mode1, mode1 1280 drivers/gpu/drm/radeon/rv515.c struct drm_display_mode *mode1 = NULL; mode1 1290 drivers/gpu/drm/radeon/rv515.c mode1 = &rdev->mode_info.crtcs[1]->base.mode; mode1 1301 drivers/gpu/drm/radeon/rv515.c if (mode1) mode1 2467 drivers/gpu/drm/radeon/si.c struct drm_display_mode *mode1 = NULL; mode1 2482 drivers/gpu/drm/radeon/si.c mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; mode1 2483 drivers/gpu/drm/radeon/si.c lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); mode1 2485 drivers/gpu/drm/radeon/si.c lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); mode1 259 drivers/rtc/rtc-pcf85063.c s8 mode0, mode1, reg; mode1 268 drivers/rtc/rtc-pcf85063.c mode1 = DIV_ROUND_CLOSEST(offset, PCF85063_OFFSET_STEP1); mode1 271 drivers/rtc/rtc-pcf85063.c error1 = abs(offset - (mode1 * PCF85063_OFFSET_STEP1)); mode1 272 drivers/rtc/rtc-pcf85063.c if (mode1 > 63 || mode1 < -64 || error0 < error1) mode1 275 drivers/rtc/rtc-pcf85063.c reg = mode1 | PCF85063_OFFSET_MODE; mode1 85 drivers/staging/comedi/drivers/addi_apci_1032.c unsigned int mode1; /* rising-edge/high level channels */ mode1 120 drivers/staging/comedi/drivers/addi_apci_1032.c devpriv->mode1 = 0; mode1 131 drivers/staging/comedi/drivers/addi_apci_1032.c devpriv->mode1 = 0; mode1 135 drivers/staging/comedi/drivers/addi_apci_1032.c devpriv->mode1 &= oldmask; mode1 139 drivers/staging/comedi/drivers/addi_apci_1032.c devpriv->mode1 |= data[4] << shift; mode1 149 drivers/staging/comedi/drivers/addi_apci_1032.c devpriv->mode1 = 0; mode1 153 drivers/staging/comedi/drivers/addi_apci_1032.c devpriv->mode1 &= oldmask; mode1 157 drivers/staging/comedi/drivers/addi_apci_1032.c devpriv->mode1 |= data[4] << shift; mode1 236 drivers/staging/comedi/drivers/addi_apci_1032.c outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG); mode1 165 drivers/staging/comedi/drivers/addi_apci_1564.c unsigned int mode1; /* rising-edge/high level channels */ mode1 345 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode1 = 0; mode1 357 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode1 = 0; mode1 361 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode1 &= oldmask; mode1 365 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode1 |= data[4] << shift; mode1 375 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode1 = 0; mode1 379 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode1 &= oldmask; mode1 383 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode1 |= data[4] << shift; mode1 391 drivers/staging/comedi/drivers/addi_apci_1564.c devpriv->mode1 &= APCI1564_DI_INT_MODE_MASK; mode1 459 drivers/staging/comedi/drivers/addi_apci_1564.c if (!devpriv->ctrl && !(devpriv->mode1 || devpriv->mode2)) { mode1 465 drivers/staging/comedi/drivers/addi_apci_1564.c outl(devpriv->mode1, dev->iobase + APCI1564_DI_INT_MODE1_REG); mode1 2168 drivers/staging/comedi/drivers/ni_mio_common.c int mode1 = 0; /* mode1 is needed for both stop and convert */ mode1 2242 drivers/staging/comedi/drivers/ni_mio_common.c mode1 |= NISTC_AI_MODE1_START_STOP | mode1 2245 drivers/staging/comedi/drivers/ni_mio_common.c ni_stc_writew(dev, mode1, NISTC_AI_MODE1_REG); mode1 2265 drivers/staging/comedi/drivers/ni_mio_common.c mode1 |= NISTC_AI_MODE1_START_STOP | mode1 2268 drivers/staging/comedi/drivers/ni_mio_common.c ni_stc_writew(dev, mode1, NISTC_AI_MODE1_REG); mode1 2345 drivers/staging/comedi/drivers/ni_mio_common.c mode1 |= NISTC_AI_MODE1_CONVERT_SRC( mode1 2350 drivers/staging/comedi/drivers/ni_mio_common.c mode1 |= NISTC_AI_MODE1_CONVERT_POLARITY; mode1 2351 drivers/staging/comedi/drivers/ni_mio_common.c ni_stc_writew(dev, mode1, NISTC_AI_MODE1_REG); mode1 251 drivers/tty/serial/max310x.c u8 mode1; mode1 419 drivers/tty/serial/max310x.c .mode1 = MAX310X_MODE1_AUTOSLEEP_BIT | MAX310X_MODE1_IRQSEL_BIT, mode1 427 drivers/tty/serial/max310x.c .mode1 = MAX310X_MODE1_AUTOSLEEP_BIT, mode1 435 drivers/tty/serial/max310x.c .mode1 = MAX310X_MODE1_AUTOSLEEP_BIT, mode1 443 drivers/tty/serial/max310x.c .mode1 = MAX310X_MODE1_IRQSEL_BIT, mode1 1010 drivers/tty/serial/max310x.c unsigned int delay, mode1 = 0, mode2 = 0; mode1 1017 drivers/tty/serial/max310x.c mode1 = MAX310X_MODE1_TRNSCVCTRL_BIT; mode1 1024 drivers/tty/serial/max310x.c MAX310X_MODE1_TRNSCVCTRL_BIT, mode1); mode1 1326 drivers/tty/serial/max310x.c devtype->mode1); mode1 476 drivers/tty/serial/sb1250-duart.c unsigned int mode1; mode1 492 drivers/tty/serial/sb1250-duart.c mode1 = read_sbdchn(sport, R_DUART_MODE_REG_1); mode1 493 drivers/tty/serial/sb1250-duart.c mode1 &= ~(M_DUART_RX_IRQ_SEL_RXFULL | M_DUART_TX_IRQ_SEL_TXEMPT); mode1 494 drivers/tty/serial/sb1250-duart.c write_sbdchn(sport, R_DUART_MODE_REG_1, mode1); mode1 542 drivers/tty/serial/sb1250-duart.c unsigned int mode1 = 0, mode2 = 0, aux = 0; mode1 561 drivers/tty/serial/sb1250-duart.c mode1 |= V_DUART_BITS_PER_CHAR_7; mode1 565 drivers/tty/serial/sb1250-duart.c mode1 |= V_DUART_BITS_PER_CHAR_8; mode1 575 drivers/tty/serial/sb1250-duart.c mode1 |= V_DUART_PARITY_MODE_ADD; mode1 577 drivers/tty/serial/sb1250-duart.c mode1 |= V_DUART_PARITY_MODE_NONE; mode1 579 drivers/tty/serial/sb1250-duart.c mode1 |= M_DUART_PARITY_TYPE_ODD; mode1 581 drivers/tty/serial/sb1250-duart.c mode1 |= M_DUART_PARITY_TYPE_EVEN; mode1 633 drivers/tty/serial/sb1250-duart.c write_sbdchn(sport, R_DUART_MODE_REG_1, mode1 | oldmode1); mode1 963 drivers/video/fbdev/core/fbmem.c struct fb_videomode mode1, mode2; mode1 965 drivers/video/fbdev/core/fbmem.c fb_var_to_videomode(&mode1, var); mode1 968 drivers/video/fbdev/core/fbmem.c ret = fb_mode_is_equal(&mode1, &mode2); mode1 971 drivers/video/fbdev/core/fbmem.c fbcon_mode_deleted(info, &mode1); mode1 974 drivers/video/fbdev/core/fbmem.c fb_delete_videomode(&mode1, &info->modelist); mode1 921 drivers/video/fbdev/core/modedb.c int fb_mode_is_equal(const struct fb_videomode *mode1, mode1 924 drivers/video/fbdev/core/modedb.c return (mode1->xres == mode2->xres && mode1 925 drivers/video/fbdev/core/modedb.c mode1->yres == mode2->yres && mode1 926 drivers/video/fbdev/core/modedb.c mode1->pixclock == mode2->pixclock && mode1 927 drivers/video/fbdev/core/modedb.c mode1->hsync_len == mode2->hsync_len && mode1 928 drivers/video/fbdev/core/modedb.c mode1->vsync_len == mode2->vsync_len && mode1 929 drivers/video/fbdev/core/modedb.c mode1->left_margin == mode2->left_margin && mode1 930 drivers/video/fbdev/core/modedb.c mode1->right_margin == mode2->right_margin && mode1 931 drivers/video/fbdev/core/modedb.c mode1->upper_margin == mode2->upper_margin && mode1 932 drivers/video/fbdev/core/modedb.c mode1->lower_margin == mode2->lower_margin && mode1 933 drivers/video/fbdev/core/modedb.c mode1->sync == mode2->sync && mode1 934 drivers/video/fbdev/core/modedb.c mode1->vmode == mode2->vmode); mode1 137 fs/dlm/lock.c int dlm_modes_compat(int mode1, int mode2) mode1 139 fs/dlm/lock.c return __dlm_compat_matrix[mode1 + 1][mode2 + 1]; mode1 20 fs/dlm/lock.h int dlm_modes_compat(int mode1, int mode2); mode1 514 include/drm/drm_modes.h bool drm_mode_match(const struct drm_display_mode *mode1, mode1 517 include/drm/drm_modes.h bool drm_mode_equal(const struct drm_display_mode *mode1, mode1 519 include/drm/drm_modes.h bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, mode1 521 include/drm/drm_modes.h bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, mode1 738 include/linux/fb.h extern int fb_mode_is_equal(const struct fb_videomode *mode1, mode1 299 samples/vfio-mdev/mbochs.c static bool mbochs_modes_equal(struct mbochs_mode *mode1, mode1 302 samples/vfio-mdev/mbochs.c return memcmp(mode1, mode2, sizeof(struct mbochs_mode)) == 0; mode1 291 sound/soc/codecs/ak4535.c u8 mode1 = 0; mode1 296 sound/soc/codecs/ak4535.c mode1 = 0x0002; mode1 299 sound/soc/codecs/ak4535.c mode1 = 0x0001; mode1 306 sound/soc/codecs/ak4535.c mode1 |= 0x4; mode1 308 sound/soc/codecs/ak4535.c snd_soc_component_write(component, AK4535_MODE1, mode1); mode1 391 sound/soc/codecs/ak4641.c u8 mode1 = 0; mode1 396 sound/soc/codecs/ak4641.c mode1 = 0x02; mode1 399 sound/soc/codecs/ak4641.c mode1 = 0x01; mode1 405 sound/soc/codecs/ak4641.c return snd_soc_component_write(component, AK4641_MODE1, mode1);