mmio_info        3521 drivers/gpu/drm/i915/gvt/handlers.c 	struct intel_gvt_mmio_info *mmio_info;
mmio_info        3543 drivers/gpu/drm/i915/gvt/handlers.c 	mmio_info = find_mmio_info(gvt, offset);
mmio_info        3544 drivers/gpu/drm/i915/gvt/handlers.c 	if (!mmio_info) {
mmio_info        3550 drivers/gpu/drm/i915/gvt/handlers.c 		return mmio_info->read(vgpu, offset, pdata, bytes);
mmio_info        3552 drivers/gpu/drm/i915/gvt/handlers.c 		u64 ro_mask = mmio_info->ro_mask;
mmio_info        3556 drivers/gpu/drm/i915/gvt/handlers.c 		if (intel_gvt_mmio_has_mode_mask(gvt, mmio_info->offset)) {
mmio_info        3561 drivers/gpu/drm/i915/gvt/handlers.c 			ret = mmio_info->write(vgpu, offset, pdata, bytes);
mmio_info        3570 drivers/gpu/drm/i915/gvt/handlers.c 			ret = mmio_info->write(vgpu, offset, &data, bytes);
mmio_info        3574 drivers/gpu/drm/i915/gvt/handlers.c 		if (intel_gvt_mmio_has_mode_mask(gvt, mmio_info->offset)) {