mmcr 635 arch/powerpc/include/asm/kvm_host.h u64 mmcr[5]; mmcr 31 arch/powerpc/include/asm/perf_event_server.h unsigned int hwc[], unsigned long mmcr[], mmcr 44 arch/powerpc/include/asm/perf_event_server.h void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]); mmcr 541 arch/powerpc/kernel/asm-offsets.c OFFSET(VCPU_MMCR, kvm_vcpu, arch.mmcr); mmcr 1658 arch/powerpc/kvm/book3s_hv.c *val = get_reg_val(id, vcpu->arch.mmcr[i]); mmcr 1879 arch/powerpc/kvm/book3s_hv.c vcpu->arch.mmcr[i] = set_reg_val(id, *val); mmcr 2289 arch/powerpc/kvm/book3s_hv.c vcpu->arch.mmcr[0] = MMCR0_FC; mmcr 45 arch/powerpc/perf/core-book3s.c unsigned long mmcr[4]; mmcr 124 arch/powerpc/perf/core-book3s.c return cpuhw->mmcr[0]; mmcr 598 arch/powerpc/perf/core-book3s.c unsigned long mmcr0 = cpuhw->mmcr[0]; mmcr 632 arch/powerpc/perf/core-book3s.c mtspr(SPRN_MMCR2, cpuhw->mmcr[3] | current->thread.mmcr2); mmcr 1240 arch/powerpc/perf/core-book3s.c if (cpuhw->mmcr[2] & MMCRA_SAMPLE_ENABLE) { mmcr 1242 arch/powerpc/perf/core-book3s.c cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); mmcr 1316 arch/powerpc/perf/core-book3s.c mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); mmcr 1317 arch/powerpc/perf/core-book3s.c mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); mmcr 1324 arch/powerpc/perf/core-book3s.c memset(cpuhw->mmcr, 0, sizeof(cpuhw->mmcr)); mmcr 1327 arch/powerpc/perf/core-book3s.c cpuhw->mmcr, cpuhw->event)) { mmcr 1341 arch/powerpc/perf/core-book3s.c cpuhw->mmcr[0] |= MMCR0_FCP; mmcr 1343 arch/powerpc/perf/core-book3s.c cpuhw->mmcr[0] |= freeze_events_kernel; mmcr 1345 arch/powerpc/perf/core-book3s.c cpuhw->mmcr[0] |= MMCR0_FCHV; mmcr 1354 arch/powerpc/perf/core-book3s.c mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); mmcr 1355 arch/powerpc/perf/core-book3s.c mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); mmcr 1356 arch/powerpc/perf/core-book3s.c mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE)) mmcr 1359 arch/powerpc/perf/core-book3s.c mtspr(SPRN_MMCR2, cpuhw->mmcr[3]); mmcr 1410 arch/powerpc/perf/core-book3s.c cpuhw->mmcr[0] |= MMCR0_PMXE | MMCR0_FCECE; mmcr 1426 arch/powerpc/perf/core-book3s.c if (cpuhw->mmcr[2] & MMCRA_SAMPLE_ENABLE) { mmcr 1428 arch/powerpc/perf/core-book3s.c mtspr(SPRN_MMCRA, cpuhw->mmcr[2]); mmcr 1558 arch/powerpc/perf/core-book3s.c ppmu->disable_pmc(event->hw.idx - 1, cpuhw->mmcr); mmcr 1579 arch/powerpc/perf/core-book3s.c cpuhw->mmcr[0] &= ~(MMCR0_PMXE | MMCR0_FCECE); mmcr 2248 arch/powerpc/perf/core-book3s.c write_mmcr0(cpuhw, cpuhw->mmcr[0]); mmcr 2270 arch/powerpc/perf/core-book3s.c cpuhw->mmcr[0] = MMCR0_FC; mmcr 366 arch/powerpc/perf/isa207-common.c unsigned int hwc[], unsigned long mmcr[], mmcr 467 arch/powerpc/perf/isa207-common.c mmcr[0] = 0; mmcr 471 arch/powerpc/perf/isa207-common.c mmcr[0] = MMCR0_PMC1CE; mmcr 474 arch/powerpc/perf/isa207-common.c mmcr[0] |= MMCR0_PMCjCE; mmcr 478 arch/powerpc/perf/isa207-common.c mmcr[0] |= MMCR0_FC56; mmcr 480 arch/powerpc/perf/isa207-common.c mmcr[1] = mmcr1; mmcr 481 arch/powerpc/perf/isa207-common.c mmcr[2] = mmcra; mmcr 482 arch/powerpc/perf/isa207-common.c mmcr[3] = mmcr2; mmcr 487 arch/powerpc/perf/isa207-common.c void isa207_disable_pmc(unsigned int pmc, unsigned long mmcr[]) mmcr 490 arch/powerpc/perf/isa207-common.c mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SHIFT(pmc + 1)); mmcr 220 arch/powerpc/perf/isa207-common.h unsigned int hwc[], unsigned long mmcr[], mmcr 222 arch/powerpc/perf/isa207-common.h void isa207_disable_pmc(unsigned int pmc, unsigned long mmcr[]); mmcr 260 arch/powerpc/perf/mpc7450-pmu.c unsigned long mmcr[], mmcr 324 arch/powerpc/perf/mpc7450-pmu.c mmcr[0] = mmcr0; mmcr 325 arch/powerpc/perf/mpc7450-pmu.c mmcr[1] = mmcr1; mmcr 326 arch/powerpc/perf/mpc7450-pmu.c mmcr[2] = mmcr2; mmcr 334 arch/powerpc/perf/mpc7450-pmu.c static void mpc7450_disable_pmc(unsigned int pmc, unsigned long mmcr[]) mmcr 337 arch/powerpc/perf/mpc7450-pmu.c mmcr[0] &= ~(pmcsel_mask[pmc] << pmcsel_shift[pmc]); mmcr 339 arch/powerpc/perf/mpc7450-pmu.c mmcr[1] &= ~(pmcsel_mask[pmc] << pmcsel_shift[pmc]); mmcr 451 arch/powerpc/perf/power5+-pmu.c unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) mmcr 589 arch/powerpc/perf/power5+-pmu.c mmcr[0] = 0; mmcr 591 arch/powerpc/perf/power5+-pmu.c mmcr[0] = MMCR0_PMC1CE; mmcr 593 arch/powerpc/perf/power5+-pmu.c mmcr[0] |= MMCR0_PMCjCE; mmcr 594 arch/powerpc/perf/power5+-pmu.c mmcr[1] = mmcr1; mmcr 595 arch/powerpc/perf/power5+-pmu.c mmcr[2] = mmcra; mmcr 599 arch/powerpc/perf/power5+-pmu.c static void power5p_disable_pmc(unsigned int pmc, unsigned long mmcr[]) mmcr 602 arch/powerpc/perf/power5+-pmu.c mmcr[1] &= ~(0x7fUL << MMCR1_PMCSEL_SH(pmc)); mmcr 382 arch/powerpc/perf/power5-pmu.c unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) mmcr 531 arch/powerpc/perf/power5-pmu.c mmcr[0] = 0; mmcr 533 arch/powerpc/perf/power5-pmu.c mmcr[0] = MMCR0_PMC1CE; mmcr 535 arch/powerpc/perf/power5-pmu.c mmcr[0] |= MMCR0_PMCjCE; mmcr 536 arch/powerpc/perf/power5-pmu.c mmcr[1] = mmcr1; mmcr 537 arch/powerpc/perf/power5-pmu.c mmcr[2] = mmcra; mmcr 541 arch/powerpc/perf/power5-pmu.c static void power5_disable_pmc(unsigned int pmc, unsigned long mmcr[]) mmcr 544 arch/powerpc/perf/power5-pmu.c mmcr[1] &= ~(0x7fUL << MMCR1_PMCSEL_SH(pmc)); mmcr 174 arch/powerpc/perf/power6-pmu.c unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) mmcr 246 arch/powerpc/perf/power6-pmu.c mmcr[0] = 0; mmcr 248 arch/powerpc/perf/power6-pmu.c mmcr[0] = MMCR0_PMC1CE; mmcr 250 arch/powerpc/perf/power6-pmu.c mmcr[0] |= MMCR0_PMCjCE; mmcr 251 arch/powerpc/perf/power6-pmu.c mmcr[1] = mmcr1; mmcr 252 arch/powerpc/perf/power6-pmu.c mmcr[2] = mmcra; mmcr 460 arch/powerpc/perf/power6-pmu.c static void p6_disable_pmc(unsigned int pmc, unsigned long mmcr[]) mmcr 464 arch/powerpc/perf/power6-pmu.c mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SH(pmc)); mmcr 245 arch/powerpc/perf/power7-pmu.c unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) mmcr 301 arch/powerpc/perf/power7-pmu.c mmcr[0] = 0; mmcr 303 arch/powerpc/perf/power7-pmu.c mmcr[0] = MMCR0_PMC1CE; mmcr 305 arch/powerpc/perf/power7-pmu.c mmcr[0] |= MMCR0_PMCjCE; mmcr 306 arch/powerpc/perf/power7-pmu.c mmcr[1] = mmcr1; mmcr 307 arch/powerpc/perf/power7-pmu.c mmcr[2] = mmcra; mmcr 311 arch/powerpc/perf/power7-pmu.c static void power7_disable_pmc(unsigned int pmc, unsigned long mmcr[]) mmcr 314 arch/powerpc/perf/power7-pmu.c mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SH(pmc)); mmcr 256 arch/powerpc/perf/ppc970-pmu.c unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) mmcr 396 arch/powerpc/perf/ppc970-pmu.c mmcr[0] = mmcr0; mmcr 397 arch/powerpc/perf/ppc970-pmu.c mmcr[1] = mmcr1; mmcr 398 arch/powerpc/perf/ppc970-pmu.c mmcr[2] = mmcra; mmcr 402 arch/powerpc/perf/ppc970-pmu.c static void p970_disable_pmc(unsigned int pmc, unsigned long mmcr[]) mmcr 416 arch/powerpc/perf/ppc970-pmu.c mmcr[i] = (mmcr[i] & ~(0x1fUL << shift)) | (0x08UL << shift); mmcr 172 drivers/mtd/maps/sc520cdp.c unsigned long __iomem *mmcr; mmcr 177 drivers/mtd/maps/sc520cdp.c mmcr = ioremap_nocache(SC520_MMCR_BASE, SC520_MMCR_EXTENT); mmcr 178 drivers/mtd/maps/sc520cdp.c if(!mmcr) { /* ioremap_nocache failed: skip the PAR reprogramming */ mmcr 192 drivers/mtd/maps/sc520cdp.c mmcr_val = readl(&mmcr[SC520_PAR(j)]); mmcr 196 drivers/mtd/maps/sc520cdp.c writel(par_table[i].new_par, &mmcr[SC520_PAR(j)]); mmcr 209 drivers/mtd/maps/sc520cdp.c iounmap(mmcr);