mmc_clock          48 drivers/clk/rockchip/clk-mmc-phase.c 	struct rockchip_mmc_clock *mmc_clock = to_mmc_clock(hw);
mmc_clock          58 drivers/clk/rockchip/clk-mmc-phase.c 	raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift);
mmc_clock          77 drivers/clk/rockchip/clk-mmc-phase.c 	struct rockchip_mmc_clock *mmc_clock = to_mmc_clock(hw);
mmc_clock         138 drivers/clk/rockchip/clk-mmc-phase.c 	writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift),
mmc_clock         139 drivers/clk/rockchip/clk-mmc-phase.c 	       mmc_clock->reg);
mmc_clock         143 drivers/clk/rockchip/clk-mmc-phase.c 		mmc_clock->reg, raw_value>>(mmc_clock->shift),
mmc_clock         161 drivers/clk/rockchip/clk-mmc-phase.c 	struct rockchip_mmc_clock *mmc_clock = to_rockchip_mmc_clock(nb);
mmc_clock         182 drivers/clk/rockchip/clk-mmc-phase.c 		mmc_clock->cached_phase =
mmc_clock         183 drivers/clk/rockchip/clk-mmc-phase.c 			rockchip_mmc_get_phase(&mmc_clock->hw);
mmc_clock         184 drivers/clk/rockchip/clk-mmc-phase.c 	else if (mmc_clock->cached_phase != -EINVAL &&
mmc_clock         186 drivers/clk/rockchip/clk-mmc-phase.c 		rockchip_mmc_set_phase(&mmc_clock->hw, mmc_clock->cached_phase);
mmc_clock         196 drivers/clk/rockchip/clk-mmc-phase.c 	struct rockchip_mmc_clock *mmc_clock;
mmc_clock         200 drivers/clk/rockchip/clk-mmc-phase.c 	mmc_clock = kmalloc(sizeof(*mmc_clock), GFP_KERNEL);
mmc_clock         201 drivers/clk/rockchip/clk-mmc-phase.c 	if (!mmc_clock)
mmc_clock         210 drivers/clk/rockchip/clk-mmc-phase.c 	mmc_clock->hw.init = &init;
mmc_clock         211 drivers/clk/rockchip/clk-mmc-phase.c 	mmc_clock->reg = reg;
mmc_clock         212 drivers/clk/rockchip/clk-mmc-phase.c 	mmc_clock->shift = shift;
mmc_clock         214 drivers/clk/rockchip/clk-mmc-phase.c 	clk = clk_register(NULL, &mmc_clock->hw);
mmc_clock         220 drivers/clk/rockchip/clk-mmc-phase.c 	mmc_clock->clk_rate_change_nb.notifier_call =
mmc_clock         222 drivers/clk/rockchip/clk-mmc-phase.c 	ret = clk_notifier_register(clk, &mmc_clock->clk_rate_change_nb);
mmc_clock         230 drivers/clk/rockchip/clk-mmc-phase.c 	kfree(mmc_clock);