mmc2_mux0_p 99 drivers/clk/hisilicon/clk-hi6220.c static const char *mmc2_mux0_p[] __initdata = { "pll_ddr_gate", "syspll", }; mmc2_mux0_p 162 drivers/clk/hisilicon/clk-hi6220.c { HI6220_MMC2_MUX0, "mmc2_mux0", mmc2_mux0_p, ARRAY_SIZE(mmc2_mux0_p), CLK_SET_RATE_PARENT, 0x400, 12, 1, CLK_MUX_HIWORD_MASK,},