mmc1_mux0_p        96 drivers/clk/hisilicon/clk-hi6220.c static const char *mmc1_mux0_p[] __initdata = { "pll_ddr_gate", "syspll", };
mmc1_mux0_p       161 drivers/clk/hisilicon/clk-hi6220.c 	{ HI6220_MMC1_MUX0,   "mmc1_mux0",   mmc1_mux0_p,    ARRAY_SIZE(mmc1_mux0_p),    CLK_SET_RATE_PARENT, 0x400, 11, 1, CLK_MUX_HIWORD_MASK,},