mmc0_mux0_p        93 drivers/clk/hisilicon/clk-hi6220.c static const char *mmc0_mux0_p[] __initdata = { "pll_ddr_gate", "syspll", };
mmc0_mux0_p       160 drivers/clk/hisilicon/clk-hi6220.c 	{ HI6220_MMC0_MUX0,   "mmc0_mux0",   mmc0_mux0_p,    ARRAY_SIZE(mmc0_mux0_p),    CLK_SET_RATE_PARENT, 0x400, 5,  1, CLK_MUX_HIWORD_MASK,},