mm_table          273 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 	if (!amdgpu_sriov_vf(adev) || adev->virt.mm_table.gpu_addr)
mm_table          278 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 				    &adev->virt.mm_table.bo,
mm_table          279 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 				    &adev->virt.mm_table.gpu_addr,
mm_table          280 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 				    (void *)&adev->virt.mm_table.cpu_addr);
mm_table          286 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 	memset((void *)adev->virt.mm_table.cpu_addr, 0, PAGE_SIZE);
mm_table          288 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 		 adev->virt.mm_table.gpu_addr,
mm_table          289 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 		 adev->virt.mm_table.cpu_addr);
mm_table          300 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 	if (!amdgpu_sriov_vf(adev) || !adev->virt.mm_table.gpu_addr)
mm_table          303 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 	amdgpu_bo_free_kernel(&adev->virt.mm_table.bo,
mm_table          304 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 			      &adev->virt.mm_table.gpu_addr,
mm_table          305 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 			      (void *)&adev->virt.mm_table.cpu_addr);
mm_table          306 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 	adev->virt.mm_table.gpu_addr = 0;
mm_table          255 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h 	struct amdgpu_mm_table		mm_table;
mm_table          773 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 	uint32_t *init_table = adev->virt.mm_table.cpu_addr;
mm_table          920 drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c 	return uvd_v7_0_mmsch_start(adev, &adev->virt.mm_table);
mm_table          213 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	uint32_t *init_table = adev->virt.mm_table.cpu_addr;
mm_table          325 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c 	return vce_v4_0_mmsch_start(adev, &adev->virt.mm_table);
mm_table          695 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c 	phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table;
mm_table          703 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c 	mm_table = kzalloc(table_size, GFP_KERNEL);
mm_table          705 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c 	if (NULL == mm_table)
mm_table          708 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c 	mm_table->count = mm_dependency_table->ucNumEntries;
mm_table          716 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c 					entries, mm_table, i);
mm_table          726 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c 	*tonga_mm_table = mm_table;
mm_table         1855 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table         1878 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	for (entry_id = 0; entry_id < mm_table->count; ++entry_id) {
mm_table         1879 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		voltage_id = mm_table->entries[entry_id].vddcInd;
mm_table         1880 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		mm_table->entries[entry_id].vddc =
mm_table         1973 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table = pptable_info->mm_dep_table;
mm_table         1976 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 		for (entry_id = 0; entry_id < mm_table->count; entry_id++) {
mm_table         1977 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			if (mm_table->entries[entry_id].vddgfx_offset & (1 << 15))
mm_table         1978 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 				v_record.us_vdd = mm_table->entries[entry_id].vddc +
mm_table         1979 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 					mm_table->entries[entry_id].vddgfx_offset - 0xFFFF;
mm_table         1981 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 				v_record.us_vdd = mm_table->entries[entry_id].vddc +
mm_table         1982 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 					mm_table->entries[entry_id].vddgfx_offset;
mm_table         1985 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			mm_table->entries[entry_id].vddgfx = v_record.us_cac_low =
mm_table          665 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table          688 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	for (entry_id = 0; entry_id < mm_table->count; ++entry_id) {
mm_table          689 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		voltage_id = mm_table->entries[entry_id].vddcInd;
mm_table          690 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		mm_table->entries[entry_id].vddc =
mm_table          349 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 	phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table;
mm_table          357 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 	mm_table = kzalloc(table_size, GFP_KERNEL);
mm_table          359 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 	if (!mm_table)
mm_table          362 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 	mm_table->count = mm_dependency_table->ucNumEntries;
mm_table          366 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 		mm_table->entries[i].vddcInd = mm_dependency_record->ucVddcInd;
mm_table          367 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 		mm_table->entries[i].samclock =
mm_table          369 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 		mm_table->entries[i].eclk = le32_to_cpu(mm_dependency_record->ulEClk);
mm_table          370 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 		mm_table->entries[i].vclk = le32_to_cpu(mm_dependency_record->ulVClk);
mm_table          371 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 		mm_table->entries[i].dclk = le32_to_cpu(mm_dependency_record->ulDClk);
mm_table          374 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c 	*vega10_mm_table = mm_table;
mm_table         1430 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table         1433 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	table->VceLevelCount = (uint8_t)(mm_table->count);
mm_table         1437 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->VceLevel[count].Frequency = mm_table->entries[count].eclk;
mm_table         1440 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				(mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT;
mm_table         1442 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				((mm_table->entries[count].vddc - VDDC_VDDCI_DELTA) *
mm_table         1469 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table         1472 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	table->AcpLevelCount = (uint8_t)(mm_table->count);
mm_table         1476 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->AcpLevel[count].Frequency = mm_table->entries[count].aclk;
mm_table         1477 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->AcpLevel[count].MinVoltage |= (mm_table->entries[count].vddc *
mm_table         1479 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->AcpLevel[count].MinVoltage |= ((mm_table->entries[count].vddc -
mm_table         1566 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table         1569 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	table->UvdLevelCount = (uint8_t)(mm_table->count);
mm_table         1574 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;
mm_table         1575 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;
mm_table         1576 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc *
mm_table         1578 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc -
mm_table         1294 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table         1299 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	table->VceLevelCount = (uint8_t)(mm_table->count);
mm_table         1303 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->VceLevel[count].Frequency = mm_table->entries[count].eclk;
mm_table         1306 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 				(mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT;
mm_table         1310 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 						mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
mm_table         1312 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA;
mm_table         1400 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table         1405 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	table->UvdLevelCount = (uint8_t)(mm_table->count);
mm_table         1410 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;
mm_table         1411 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;
mm_table         1412 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 		table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc *
mm_table         1417 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 						mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
mm_table         1419 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA;
mm_table         1317 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table         1320 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	table->UvdLevelCount = (uint8_t) (mm_table->count);
mm_table         1324 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;
mm_table         1325 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;
mm_table         1328 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 						mm_table->entries[count].vddc);
mm_table         1332 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 						mm_table->entries[count].vddgfx) : 0;
mm_table         1335 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 					     mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
mm_table         1377 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table         1380 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	table->VceLevelCount = (uint8_t) (mm_table->count);
mm_table         1385 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			mm_table->entries[count].eclk;
mm_table         1388 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				mm_table->entries[count].vddc);
mm_table         1392 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				mm_table->entries[count].vddgfx) : 0;
mm_table         1395 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
mm_table         1422 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table         1425 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	table->AcpLevelCount = (uint8_t) (mm_table->count);
mm_table         1433 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			mm_table->entries[count].vddc);
mm_table         1437 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				mm_table->entries[count].vddgfx) : 0;
mm_table         1440 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
mm_table         1211 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table         1216 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	table->VceLevelCount = (uint8_t)(mm_table->count);
mm_table         1220 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		table->VceLevel[count].Frequency = mm_table->entries[count].eclk;
mm_table         1223 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 				(mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT;
mm_table         1227 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 						mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
mm_table         1229 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA;
mm_table         1324 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	struct phm_ppt_v1_mm_clock_voltage_dependency_table *mm_table =
mm_table         1329 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 	table->UvdLevelCount = (uint8_t)(mm_table->count);
mm_table         1334 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;
mm_table         1335 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 		table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;
mm_table         1337 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 				(mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT;
mm_table         1341 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 						mm_table->entries[count].vddc - VDDC_VDDCI_DELTA);
mm_table         1343 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA;