MinVddc 49 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h uint32_t MinVddc; MinVddc 79 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h uint32_t MinVddc; MinVddc 112 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h uint32_t MinVddc; MinVddc 190 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h uint16_t MinVddc; MinVddc 106 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h uint32_t MinVddc; MinVddc 137 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h uint32_t MinVddc; MinVddc 170 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h uint32_t MinVddc; MinVddc 244 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h uint16_t MinVddc; MinVddc 418 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c (uint32_t *)(&level->MinVddc)); MinVddc 455 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c level->MinVddc = PP_HOST_TO_SMC_UL(level->MinVddc * VOLTAGE_SCALE); MinVddc 1187 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c hwmgr->dyn_state.vddc_dependency_on_mclk, memory_clock, &memory_level->MinVddc); MinVddc 1276 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c memory_level->MinVddc = PP_HOST_TO_SMC_UL(memory_level->MinVddc * VOLTAGE_SCALE); MinVddc 1393 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE); MinVddc 1395 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE); MinVddc 1444 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c table->MemoryACPILevel.MinVddc = table->ACPILevel.MinVddc; MinVddc 1448 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c table->MemoryACPILevel.MinVddci = table->MemoryACPILevel.MinVddc; MinVddc 1532 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c table->UvdLevel[count].MinVddc = MinVddc 1551 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c CONVERT_FROM_HOST_TO_SMC_US(table->UvdLevel[count].MinVddc); MinVddc 903 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c &graphic_level->MinVddc); MinVddc 944 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c graphic_level->MinVddc = PP_HOST_TO_SMC_UL(graphic_level->MinVddc * VOLTAGE_SCALE); MinVddc 1242 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c hwmgr->dyn_state.vddc_dependency_on_mclk, memory_clock, &memory_level->MinVddc); MinVddc 1248 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c memory_level->MinVddci = memory_level->MinVddc; MinVddc 1324 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c memory_level->MinVddc = PP_HOST_TO_SMC_UL(memory_level->MinVddc * VOLTAGE_SCALE); MinVddc 1441 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE); MinVddc 1443 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE); MinVddc 1492 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c table->MemoryACPILevel.MinVddc = table->ACPILevel.MinVddc; MinVddc 1496 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c table->MemoryACPILevel.MinVddci = table->MemoryACPILevel.MinVddc; MinVddc 2663 drivers/gpu/drm/radeon/ci_dpm.c table->UvdLevel[count].MinVddc = MinVddc 2685 drivers/gpu/drm/radeon/ci_dpm.c table->UvdLevel[count].MinVddc = cpu_to_be16(table->UvdLevel[count].MinVddc); MinVddc 2886 drivers/gpu/drm/radeon/ci_dpm.c memory_clock, &memory_level->MinVddc); MinVddc 2969 drivers/gpu/drm/radeon/ci_dpm.c memory_level->MinVddc = cpu_to_be32(memory_level->MinVddc * VOLTAGE_SCALE); MinVddc 3004 drivers/gpu/drm/radeon/ci_dpm.c table->ACPILevel.MinVddc = cpu_to_be32(pi->acpi_vddc * VOLTAGE_SCALE); MinVddc 3006 drivers/gpu/drm/radeon/ci_dpm.c table->ACPILevel.MinVddc = cpu_to_be32(pi->min_vddc_in_pp_table * VOLTAGE_SCALE); MinVddc 3049 drivers/gpu/drm/radeon/ci_dpm.c table->MemoryACPILevel.MinVddc = table->ACPILevel.MinVddc; MinVddc 3229 drivers/gpu/drm/radeon/ci_dpm.c engine_clock, &graphic_level->MinVddc); MinVddc 3262 drivers/gpu/drm/radeon/ci_dpm.c graphic_level->MinVddc = cpu_to_be32(graphic_level->MinVddc * VOLTAGE_SCALE); MinVddc 3350 drivers/gpu/drm/radeon/ci_dpm.c pi->smc_state_table.MemoryLevel[1].MinVddc = MinVddc 3351 drivers/gpu/drm/radeon/ci_dpm.c pi->smc_state_table.MemoryLevel[0].MinVddc; MinVddc 106 drivers/gpu/drm/radeon/smu7_discrete.h uint32_t MinVddc; MinVddc 137 drivers/gpu/drm/radeon/smu7_discrete.h uint32_t MinVddc; MinVddc 170 drivers/gpu/drm/radeon/smu7_discrete.h uint32_t MinVddc; MinVddc 244 drivers/gpu/drm/radeon/smu7_discrete.h uint16_t MinVddc;