MinTTUVBlank     2374 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 			mode_lib->vba.MinTTUVBlank[k] = dml_max(
MinTTUVBlank     2382 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 			mode_lib->vba.MinTTUVBlank[k] = dml_max(
MinTTUVBlank     2388 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 			mode_lib->vba.MinTTUVBlank[k] = mode_lib->vba.UrgentWatermark;
MinTTUVBlank     2391 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 			mode_lib->vba.MinTTUVBlank[k] = mode_lib->vba.TCalc
MinTTUVBlank     2392 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c 					+ mode_lib->vba.MinTTUVBlank[k];
MinTTUVBlank     2407 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 			mode_lib->vba.MinTTUVBlank[k] = dml_max(
MinTTUVBlank     2415 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 			mode_lib->vba.MinTTUVBlank[k] = dml_max(
MinTTUVBlank     2421 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 			mode_lib->vba.MinTTUVBlank[k] = mode_lib->vba.UrgentWatermark;
MinTTUVBlank     2424 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 			mode_lib->vba.MinTTUVBlank[k] = mode_lib->vba.TCalc
MinTTUVBlank     2425 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c 					+ mode_lib->vba.MinTTUVBlank[k];
MinTTUVBlank     2561 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			locals->MinTTUVBlank[k] = dml_max(
MinTTUVBlank     2569 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			locals->MinTTUVBlank[k] = dml_max(
MinTTUVBlank     2575 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			locals->MinTTUVBlank[k] = mode_lib->vba.UrgentWatermark;
MinTTUVBlank     2578 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			locals->MinTTUVBlank[k] = mode_lib->vba.TCalc
MinTTUVBlank     2579 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 					+ locals->MinTTUVBlank[k];
MinTTUVBlank      122 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c dml_get_pipe_attr_func(min_ttu_vblank, mode_lib->vba.MinTTUVBlank);
MinTTUVBlank      681 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double MinTTUVBlank[DC__NUM_DPP__MAX];