MemoryLevel       272 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     SMU71_Discrete_MemoryLevel           MemoryLevel             [SMU71_MAX_LEVELS_MEMORY];
MemoryLevel       267 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	SMU72_Discrete_MemoryLevel          MemoryLevel[SMU72_MAX_LEVELS_MEMORY];
MemoryLevel       251 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     SMU73_Discrete_MemoryLevel          MemoryLevel             [SMU73_MAX_LEVELS_MEMORY];
MemoryLevel       283 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	SMU74_Discrete_MemoryLevel          MemoryLevel[SMU74_MAX_LEVELS_MEMORY];
MemoryLevel       289 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	SMU75_Discrete_MemoryLevel          MemoryLevel             [SMU75_MAX_LEVELS_MEMORY];
MemoryLevel       325 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     SMU7_Discrete_MemoryLevel           MemoryLevel             [SMU7_MAX_LEVELS_MEMORY];
MemoryLevel      1307 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	uint32_t level_array_address = smu_data->dpm_table_start + offsetof(SMU7_Discrete_DpmTable, MemoryLevel);
MemoryLevel      1309 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	SMU7_Discrete_MemoryLevel *levels = smu_data->smc_state_table.MemoryLevel;
MemoryLevel      1318 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			&(smu_data->smc_state_table.MemoryLevel[i]));
MemoryLevel      1323 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;
MemoryLevel      1329 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		smu_data->smc_state_table.MemoryLevel[1].MinVddci =
MemoryLevel      1330 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				smu_data->smc_state_table.MemoryLevel[0].MinVddci;
MemoryLevel      1331 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		smu_data->smc_state_table.MemoryLevel[1].MinMvdd =
MemoryLevel      1332 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				smu_data->smc_state_table.MemoryLevel[0].MinMvdd;
MemoryLevel      1334 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F;
MemoryLevel      1335 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel);
MemoryLevel      1339 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISPLAY_WATERMARK_HIGH;
MemoryLevel      2770 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			offsetof(SMU7_Discrete_DpmTable, MemoryLevel);
MemoryLevel      2772 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			smu_data->smc_state_table.MemoryLevel;
MemoryLevel      1231 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			offsetof(SMU73_Discrete_DpmTable, MemoryLevel);
MemoryLevel      1235 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			smu_data->smc_state_table.MemoryLevel;
MemoryLevel      2562 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			offsetof(SMU73_Discrete_DpmTable, MemoryLevel);
MemoryLevel      2564 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 			smu_data->smc_state_table.MemoryLevel;
MemoryLevel      1354 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	uint32_t level_array_adress = smu_data->smu7_data.dpm_table_start + offsetof(SMU71_Discrete_DpmTable, MemoryLevel);
MemoryLevel      1356 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	SMU71_Discrete_MemoryLevel *levels = smu_data->smc_state_table.MemoryLevel;
MemoryLevel      1365 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			&(smu_data->smc_state_table.MemoryLevel[i]));
MemoryLevel      1372 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;
MemoryLevel      1379 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F;
MemoryLevel      1380 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel);
MemoryLevel      1385 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISPLAY_WATERMARK_HIGH;
MemoryLevel       154 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 	graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, MemoryLevel);
MemoryLevel      1132 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			offsetof(SMU74_Discrete_DpmTable, MemoryLevel);
MemoryLevel      1136 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			smu_data->smc_state_table.MemoryLevel;
MemoryLevel      2475 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			offsetof(SMU74_Discrete_DpmTable, MemoryLevel);
MemoryLevel      2477 drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c 			smu_data->smc_state_table.MemoryLevel;
MemoryLevel      1097 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				offsetof(SMU72_Discrete_DpmTable, MemoryLevel);
MemoryLevel      1102 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				smu_data->smc_state_table.MemoryLevel;
MemoryLevel      1114 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 				&(smu_data->smc_state_table.MemoryLevel[i]));
MemoryLevel      1120 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	smu_data->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;
MemoryLevel      1127 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F;
MemoryLevel      1128 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel);
MemoryLevel      1133 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	smu_data->smc_state_table.MemoryLevel[dpm_table->mclk_table.count-1].DisplayWatermark = PPSMC_DISPLAY_WATERMARK_HIGH;
MemoryLevel      1242 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			    smu_data->smc_state_table.MemoryLevel[0].MinVoltage;
MemoryLevel      3158 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			offsetof(SMU72_Discrete_DpmTable, MemoryLevel);
MemoryLevel      3160 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			smu_data->smc_state_table.MemoryLevel;
MemoryLevel      1039 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			offsetof(SMU75_Discrete_DpmTable, MemoryLevel);
MemoryLevel      1043 drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c 			smu_data->smc_state_table.MemoryLevel;
MemoryLevel      3328 drivers/gpu/drm/radeon/ci_dpm.c 		offsetof(SMU7_Discrete_DpmTable, MemoryLevel);
MemoryLevel      3331 drivers/gpu/drm/radeon/ci_dpm.c 	SMU7_Discrete_MemoryLevel *levels = pi->smc_state_table.MemoryLevel;
MemoryLevel      3341 drivers/gpu/drm/radeon/ci_dpm.c 						      &pi->smc_state_table.MemoryLevel[i]);
MemoryLevel      3346 drivers/gpu/drm/radeon/ci_dpm.c 	pi->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;
MemoryLevel      3350 drivers/gpu/drm/radeon/ci_dpm.c 		pi->smc_state_table.MemoryLevel[1].MinVddc =
MemoryLevel      3351 drivers/gpu/drm/radeon/ci_dpm.c 			pi->smc_state_table.MemoryLevel[0].MinVddc;
MemoryLevel      3352 drivers/gpu/drm/radeon/ci_dpm.c 		pi->smc_state_table.MemoryLevel[1].MinVddcPhases =
MemoryLevel      3353 drivers/gpu/drm/radeon/ci_dpm.c 			pi->smc_state_table.MemoryLevel[0].MinVddcPhases;
MemoryLevel      3356 drivers/gpu/drm/radeon/ci_dpm.c 	pi->smc_state_table.MemoryLevel[0].ActivityLevel = cpu_to_be16(0x1F);
MemoryLevel      3362 drivers/gpu/drm/radeon/ci_dpm.c 	pi->smc_state_table.MemoryLevel[dpm_table->mclk_table.count - 1].DisplayWatermark =
MemoryLevel       324 drivers/gpu/drm/radeon/smu7_discrete.h     SMU7_Discrete_MemoryLevel           MemoryLevel             [SMU7_MAX_LEVELS_MEMORY];