mltd              453 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t mltd:1;
mltd              455 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t mltd:1;
mltd              508 arch/mips/pci/pci-octeon.c 	cfg16.s.mltd = 1;	/* Master Latency Timer Disable */