mispp              67 drivers/gpu/drm/mcde/mcde_display.c 	u32 mispp, misovl, mischnl;
mispp              71 drivers/gpu/drm/mcde/mcde_display.c 	mispp = readl(mcde->regs + MCDE_MISPP);
mispp             106 drivers/gpu/drm/mcde/mcde_display.c 	if (mispp & MCDE_PP_VCMPA) {
mispp             110 drivers/gpu/drm/mcde/mcde_display.c 	if (mispp & MCDE_PP_VCMPB) {
mispp             114 drivers/gpu/drm/mcde/mcde_display.c 	if (mispp & MCDE_PP_VCMPC0)
mispp             116 drivers/gpu/drm/mcde/mcde_display.c 	if (mispp & MCDE_PP_VCMPC1)
mispp             118 drivers/gpu/drm/mcde/mcde_display.c 	if (mispp & MCDE_PP_VSCC0)
mispp             120 drivers/gpu/drm/mcde/mcde_display.c 	if (mispp & MCDE_PP_VSCC1)
mispp             122 drivers/gpu/drm/mcde/mcde_display.c 	writel(mispp, mcde->regs + MCDE_RISPP);