misc_spec        1328 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 	struct mlx5dr_match_misc *misc_spec = &value->misc;
misc_spec        1359 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		if (misc_spec->inner_second_cvlan_tag) {
misc_spec        1361 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 			misc_spec->inner_second_cvlan_tag = 0;
misc_spec        1362 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		} else if (misc_spec->inner_second_svlan_tag) {
misc_spec        1364 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 			misc_spec->inner_second_svlan_tag = 0;
misc_spec        1367 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		DR_STE_SET_TAG(eth_l2_src, tag, second_vlan_id, misc_spec, inner_second_vid);
misc_spec        1368 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		DR_STE_SET_TAG(eth_l2_src, tag, second_cfi, misc_spec, inner_second_cfi);
misc_spec        1369 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		DR_STE_SET_TAG(eth_l2_src, tag, second_priority, misc_spec, inner_second_prio);
misc_spec        1371 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		if (misc_spec->outer_second_cvlan_tag) {
misc_spec        1373 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 			misc_spec->outer_second_cvlan_tag = 0;
misc_spec        1374 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		} else if (misc_spec->outer_second_svlan_tag) {
misc_spec        1376 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 			misc_spec->outer_second_svlan_tag = 0;
misc_spec        1378 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		DR_STE_SET_TAG(eth_l2_src, tag, second_vlan_id, misc_spec, outer_second_vid);
misc_spec        1379 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		DR_STE_SET_TAG(eth_l2_src, tag, second_cfi, misc_spec, outer_second_cfi);
misc_spec        1380 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		DR_STE_SET_TAG(eth_l2_src, tag, second_priority, misc_spec, outer_second_prio);