misc_3_mask      1832 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 	struct mlx5dr_match_misc3 *misc_3_mask = &mask->misc3;
misc_3_mask      1833 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 	bool is_ipv4_mask = DR_MASK_IS_FLEX_PARSER_ICMPV4_SET(misc_3_mask);
misc_3_mask      1841 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		icmp_header_data_mask	= misc_3_mask->icmpv4_header_data;
misc_3_mask      1842 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		icmp_type_mask		= misc_3_mask->icmpv4_type;
misc_3_mask      1843 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		icmp_code_mask		= misc_3_mask->icmpv4_code;
misc_3_mask      1847 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		icmp_header_data_mask	= misc_3_mask->icmpv6_header_data;
misc_3_mask      1848 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		icmp_type_mask		= misc_3_mask->icmpv6_type;
misc_3_mask      1849 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		icmp_code_mask		= misc_3_mask->icmpv6_code;
misc_3_mask      1860 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 				misc_3_mask->icmpv4_type = 0;
misc_3_mask      1862 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 				misc_3_mask->icmpv6_type = 0;
misc_3_mask      1870 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 				misc_3_mask->icmpv4_code = 0;
misc_3_mask      1872 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 				misc_3_mask->icmpv6_code = 0;
misc_3_mask      1885 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 				misc_3_mask->icmpv4_header_data = 0;
misc_3_mask      1887 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 				misc_3_mask->icmpv6_header_data = 0;
misc_3_mask      2031 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 	struct mlx5dr_match_misc3 *misc_3_mask = &value->misc3;
misc_3_mask      2034 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		DR_STE_SET_MASK_V(eth_l4_misc, bit_mask, seq_num, misc_3_mask,
misc_3_mask      2036 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		DR_STE_SET_MASK_V(eth_l4_misc, bit_mask, ack_num, misc_3_mask,
misc_3_mask      2039 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		DR_STE_SET_MASK_V(eth_l4_misc, bit_mask, seq_num, misc_3_mask,
misc_3_mask      2041 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		DR_STE_SET_MASK_V(eth_l4_misc, bit_mask, ack_num, misc_3_mask,
misc_3_mask      2081 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 	struct mlx5dr_match_misc3 *misc_3_mask = &value->misc3;
misc_3_mask      2083 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 	if (misc_3_mask->outer_vxlan_gpe_flags ||
misc_3_mask      2084 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 	    misc_3_mask->outer_vxlan_gpe_next_protocol) {
misc_3_mask      2087 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 			 (misc_3_mask->outer_vxlan_gpe_flags << 24) |
misc_3_mask      2088 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 			 (misc_3_mask->outer_vxlan_gpe_next_protocol));
misc_3_mask      2089 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		misc_3_mask->outer_vxlan_gpe_flags = 0;
misc_3_mask      2090 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		misc_3_mask->outer_vxlan_gpe_next_protocol = 0;
misc_3_mask      2093 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 	if (misc_3_mask->outer_vxlan_gpe_vni) {
misc_3_mask      2096 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 			 misc_3_mask->outer_vxlan_gpe_vni << 8);
misc_3_mask      2097 drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c 		misc_3_mask->outer_vxlan_gpe_vni = 0;