misc0 283 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c uint32_t misc0 = 0; misc0 396 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c misc0 = misc0 | synchronous_clock; misc0 397 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c misc0 = colorimetry_bpc << 5; misc0 402 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c misc0 = misc0 | 0x0; misc0 407 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c misc0 = misc0 | 0x8; /* bit3=1 */ misc0 413 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c misc0 = misc0 | 0x8; /* bit3=1, bit4=0 */ misc0 417 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */ misc0 419 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */ misc0 424 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c misc0 = misc0 | 0x18; /* bit3=1, bit4=1 */ misc0 428 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */ misc0 430 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */ misc0 459 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_SET(DP_MSA_COLORIMETRY, 0, DP_MSA_MISC0, misc0); misc0 254 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c uint32_t misc0 = 0; misc0 370 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c misc0 = misc0 | synchronous_clock; misc0 371 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c misc0 = colorimetry_bpc << 5; misc0 379 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c misc0 = misc0 | 0x8; /* bit3=1 */ misc0 385 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c misc0 = misc0 | 0x8; /* bit3=1, bit4=0 */ misc0 389 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */ misc0 391 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */ misc0 395 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c misc0 = misc0 | 0x18; /* bit3=1, bit4=1 */ misc0 399 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c misc0 = misc0 | 0x2; /* bit2=0, bit1=1 */ misc0 401 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c misc0 = misc0 | 0x4; /* bit2=1, bit1=0 */ misc0 424 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_SET(DP_MSA_COLORIMETRY, 0, DP_MSA_MISC0, misc0); misc0 12514 drivers/net/ethernet/qlogic/qed/qed_hsi.h u32 misc0; misc0 12535 drivers/net/ethernet/qlogic/qed/qed_hsi.h u32 misc0; misc0 834 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_SET_FIELD(load_req.misc0, LOAD_REQ_ROLE, p_in_params->drv_role); misc0 835 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_SET_FIELD(load_req.misc0, LOAD_REQ_LOCK_TO, misc0 837 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_SET_FIELD(load_req.misc0, LOAD_REQ_FORCE, misc0 839 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_SET_FIELD(load_req.misc0, LOAD_REQ_FLAGS0, misc0 869 drivers/net/ethernet/qlogic/qed/qed_mcp.c load_req.misc0, misc0 870 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_GET_FIELD(load_req.misc0, LOAD_REQ_ROLE), misc0 871 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_GET_FIELD(load_req.misc0, misc0 873 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_GET_FIELD(load_req.misc0, LOAD_REQ_FORCE), misc0 874 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_GET_FIELD(load_req.misc0, LOAD_REQ_FLAGS0)); misc0 895 drivers/net/ethernet/qlogic/qed/qed_mcp.c load_rsp.misc0, misc0 896 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_GET_FIELD(load_rsp.misc0, LOAD_RSP_ROLE), misc0 897 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_GET_FIELD(load_rsp.misc0, LOAD_RSP_HSI), misc0 898 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_GET_FIELD(load_rsp.misc0, LOAD_RSP_FLAGS0)); misc0 904 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_GET_FIELD(load_rsp.misc0, LOAD_RSP_ROLE); misc0 906 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_GET_FIELD(load_rsp.misc0, LOAD_RSP_HSI); misc0 908 drivers/net/ethernet/qlogic/qed/qed_mcp.c QED_MFW_GET_FIELD(load_rsp.misc0, LOAD_RSP_FLAGS0) &