mipspmu 93 arch/mips/kernel/perf_event_mipsxx.c static struct mips_pmu mipspmu; mipspmu 296 arch/mips/kernel/perf_event_mipsxx.c for (i = mipspmu.num_counters - 1; i >= 0; i--) { mipspmu 321 arch/mips/kernel/perf_event_mipsxx.c WARN_ON(idx < 0 || idx >= mipspmu.num_counters); mipspmu 361 arch/mips/kernel/perf_event_mipsxx.c WARN_ON(idx < 0 || idx >= mipspmu.num_counters); mipspmu 392 arch/mips/kernel/perf_event_mipsxx.c if (left > mipspmu.max_period) { mipspmu 393 arch/mips/kernel/perf_event_mipsxx.c left = mipspmu.max_period; mipspmu 397 arch/mips/kernel/perf_event_mipsxx.c local64_set(&hwc->prev_count, mipspmu.overflow - left); mipspmu 399 arch/mips/kernel/perf_event_mipsxx.c mipspmu.write_counter(idx, mipspmu.overflow - left); mipspmu 415 arch/mips/kernel/perf_event_mipsxx.c new_raw_count = mipspmu.read_counter(idx); mipspmu 498 arch/mips/kernel/perf_event_mipsxx.c WARN_ON(idx < 0 || idx >= mipspmu.num_counters); mipspmu 553 arch/mips/kernel/perf_event_mipsxx.c if (mipspmu.irq >= 0) { mipspmu 555 arch/mips/kernel/perf_event_mipsxx.c err = request_irq(mipspmu.irq, mipsxx_pmu_handle_irq, mipspmu 559 arch/mips/kernel/perf_event_mipsxx.c "mips_perf_pmu", &mipspmu); mipspmu 562 arch/mips/kernel/perf_event_mipsxx.c mipspmu.irq); mipspmu 581 arch/mips/kernel/perf_event_mipsxx.c if (mipspmu.irq >= 0) mipspmu 582 arch/mips/kernel/perf_event_mipsxx.c free_irq(mipspmu.irq, &mipspmu); mipspmu 603 arch/mips/kernel/perf_event_mipsxx.c (void *)(long)mipspmu.num_counters, 1); mipspmu 677 arch/mips/kernel/perf_event_mipsxx.c if ((*mipspmu.general_event_map)[idx].cntr_mask == 0) mipspmu 679 arch/mips/kernel/perf_event_mipsxx.c return &(*mipspmu.general_event_map)[idx]; mipspmu 699 arch/mips/kernel/perf_event_mipsxx.c pev = &((*mipspmu.cache_event_map) mipspmu 792 arch/mips/kernel/perf_event_mipsxx.c mipspmu.write_counter(3, 0); mipspmu 796 arch/mips/kernel/perf_event_mipsxx.c mipspmu.write_counter(2, 0); mipspmu 800 arch/mips/kernel/perf_event_mipsxx.c mipspmu.write_counter(1, 0); mipspmu 804 arch/mips/kernel/perf_event_mipsxx.c mipspmu.write_counter(0, 0); mipspmu 1296 arch/mips/kernel/perf_event_mipsxx.c pev = mipspmu.map_raw_event(event->attr.config); mipspmu 1337 arch/mips/kernel/perf_event_mipsxx.c hwc->sample_period = mipspmu.max_period; mipspmu 1357 arch/mips/kernel/perf_event_mipsxx.c int ctr = mipspmu.num_counters; mipspmu 1373 arch/mips/kernel/perf_event_mipsxx.c int ctr = mipspmu.num_counters; mipspmu 1385 arch/mips/kernel/perf_event_mipsxx.c unsigned int counters = mipspmu.num_counters; mipspmu 1412 arch/mips/kernel/perf_event_mipsxx.c counter = mipspmu.read_counter(n); mipspmu 1413 arch/mips/kernel/perf_event_mipsxx.c if (!(counter & mipspmu.overflow)) mipspmu 1709 arch/mips/kernel/perf_event_mipsxx.c mipspmu.map_raw_event = mipsxx_pmu_map_raw_event; mipspmu 1713 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/24K"; mipspmu 1714 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu 1715 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &mipsxxcore_cache_map; mipspmu 1718 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/34K"; mipspmu 1719 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu 1720 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &mipsxxcore_cache_map; mipspmu 1723 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/74K"; mipspmu 1724 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &mipsxxcore_event_map2; mipspmu 1725 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &mipsxxcore_cache_map2; mipspmu 1728 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/proAptiv"; mipspmu 1729 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &mipsxxcore_event_map2; mipspmu 1730 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &mipsxxcore_cache_map2; mipspmu 1733 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/P5600"; mipspmu 1734 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &mipsxxcore_event_map2; mipspmu 1735 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &mipsxxcore_cache_map2; mipspmu 1738 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/P6600"; mipspmu 1739 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &mipsxxcore_event_map2; mipspmu 1740 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &mipsxxcore_cache_map2; mipspmu 1743 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/I6400"; mipspmu 1744 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &i6x00_event_map; mipspmu 1745 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &i6x00_cache_map; mipspmu 1748 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/I6500"; mipspmu 1749 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &i6x00_event_map; mipspmu 1750 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &i6x00_cache_map; mipspmu 1753 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/1004K"; mipspmu 1754 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu 1755 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &mipsxxcore_cache_map; mipspmu 1758 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/1074K"; mipspmu 1759 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu 1760 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &mipsxxcore_cache_map; mipspmu 1763 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/interAptiv"; mipspmu 1764 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu 1765 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &mipsxxcore_cache_map; mipspmu 1768 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/loongson1"; mipspmu 1769 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &mipsxxcore_event_map; mipspmu 1770 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &mipsxxcore_cache_map; mipspmu 1773 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "mips/loongson3"; mipspmu 1774 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &loongson3_event_map; mipspmu 1775 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &loongson3_cache_map; mipspmu 1780 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "octeon"; mipspmu 1781 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &octeon_event_map; mipspmu 1782 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &octeon_cache_map; mipspmu 1783 arch/mips/kernel/perf_event_mipsxx.c mipspmu.map_raw_event = octeon_pmu_map_raw_event; mipspmu 1786 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "BMIPS5000"; mipspmu 1787 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &bmips5000_event_map; mipspmu 1788 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &bmips5000_cache_map; mipspmu 1791 arch/mips/kernel/perf_event_mipsxx.c mipspmu.name = "xlp"; mipspmu 1792 arch/mips/kernel/perf_event_mipsxx.c mipspmu.general_event_map = &xlp_event_map; mipspmu 1793 arch/mips/kernel/perf_event_mipsxx.c mipspmu.cache_event_map = &xlp_cache_map; mipspmu 1794 arch/mips/kernel/perf_event_mipsxx.c mipspmu.map_raw_event = xlp_pmu_map_raw_event; mipspmu 1802 arch/mips/kernel/perf_event_mipsxx.c mipspmu.num_counters = counters; mipspmu 1803 arch/mips/kernel/perf_event_mipsxx.c mipspmu.irq = irq; mipspmu 1806 arch/mips/kernel/perf_event_mipsxx.c mipspmu.max_period = (1ULL << 63) - 1; mipspmu 1807 arch/mips/kernel/perf_event_mipsxx.c mipspmu.valid_count = (1ULL << 63) - 1; mipspmu 1808 arch/mips/kernel/perf_event_mipsxx.c mipspmu.overflow = 1ULL << 63; mipspmu 1809 arch/mips/kernel/perf_event_mipsxx.c mipspmu.read_counter = mipsxx_pmu_read_counter_64; mipspmu 1810 arch/mips/kernel/perf_event_mipsxx.c mipspmu.write_counter = mipsxx_pmu_write_counter_64; mipspmu 1813 arch/mips/kernel/perf_event_mipsxx.c mipspmu.max_period = (1ULL << 31) - 1; mipspmu 1814 arch/mips/kernel/perf_event_mipsxx.c mipspmu.valid_count = (1ULL << 31) - 1; mipspmu 1815 arch/mips/kernel/perf_event_mipsxx.c mipspmu.overflow = 1ULL << 31; mipspmu 1816 arch/mips/kernel/perf_event_mipsxx.c mipspmu.read_counter = mipsxx_pmu_read_counter; mipspmu 1817 arch/mips/kernel/perf_event_mipsxx.c mipspmu.write_counter = mipsxx_pmu_write_counter; mipspmu 1824 arch/mips/kernel/perf_event_mipsxx.c "CPU, irq %d%s\n", mipspmu.name, counters, counter_bits, irq,