mips_irq_chip_reg_en_w1s  170 arch/mips/paravirt/paravirt-irq.c static int mips_irq_chip_reg_en_w1s;
mips_irq_chip_reg_en_w1s  177 arch/mips/paravirt/paravirt-irq.c 	__raw_writel(mask, mips_irq_chip + mips_irq_chip_reg_en_w1s);
mips_irq_chip_reg_en_w1s  202 arch/mips/paravirt/paravirt-irq.c 	__raw_writel(mask, mips_irq_chip + mips_irq_chip_reg_en_w1s);
mips_irq_chip_reg_en_w1s  231 arch/mips/paravirt/paravirt-irq.c 	irq_mbox_all(data, mips_irq_chip + mips_irq_chip_reg_en_w1s + sizeof(u32));
mips_irq_chip_reg_en_w1s  276 arch/mips/paravirt/paravirt-irq.c 	irq_mbox_cpu_onoffline(data, mips_irq_chip + mips_irq_chip_reg_en_w1s + sizeof(u32));
mips_irq_chip_reg_en_w1s  311 arch/mips/paravirt/paravirt-irq.c 	mips_irq_chip_reg_en_w1s	= MIPS_IRQ_CHIP_REGS + 5 * stride;