mipi_val          163 drivers/gpu/drm/gma500/mdfld_device.c 	u32 *mipi_val;
mipi_val          170 drivers/gpu/drm/gma500/mdfld_device.c 		mipi_val = &regs->saveMIPI;
mipi_val          173 drivers/gpu/drm/gma500/mdfld_device.c 		mipi_val = &regs->saveMIPI;
mipi_val          179 drivers/gpu/drm/gma500/mdfld_device.c 		mipi_val = &regs->saveMIPI_C;
mipi_val          219 drivers/gpu/drm/gma500/mdfld_device.c 	*mipi_val = PSB_RVDC32(mipi_reg);
mipi_val          249 drivers/gpu/drm/gma500/mdfld_device.c 	u32 mipi_val = regs->saveMIPI;
mipi_val          261 drivers/gpu/drm/gma500/mdfld_device.c 		mipi_val = regs->saveMIPI_C;
mipi_val          353 drivers/gpu/drm/gma500/mdfld_device.c 	PSB_WVDC32(mipi_val, mipi_reg);
mipi_val          601 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c 	u32 mipi_val = 0;
mipi_val          655 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c 		mipi_val = PASS_FROM_SPHY_TO_AFE | SEL_FLOPPED_HSTX;
mipi_val          658 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c 			mipi_val |= 0x2;
mipi_val          660 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c 		REG_WRITE(MIPI_PORT_CONTROL(pipe), mipi_val);