mipi_tx           140 drivers/gpu/drm/mediatek/mtk_mipi_tx.c static void mtk_mipi_tx_clear_bits(struct mtk_mipi_tx *mipi_tx, u32 offset,
mipi_tx           143 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	u32 temp = readl(mipi_tx->regs + offset);
mipi_tx           145 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	writel(temp & ~bits, mipi_tx->regs + offset);
mipi_tx           148 drivers/gpu/drm/mediatek/mtk_mipi_tx.c static void mtk_mipi_tx_set_bits(struct mtk_mipi_tx *mipi_tx, u32 offset,
mipi_tx           151 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	u32 temp = readl(mipi_tx->regs + offset);
mipi_tx           153 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	writel(temp | bits, mipi_tx->regs + offset);
mipi_tx           156 drivers/gpu/drm/mediatek/mtk_mipi_tx.c static void mtk_mipi_tx_update_bits(struct mtk_mipi_tx *mipi_tx, u32 offset,
mipi_tx           159 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	u32 temp = readl(mipi_tx->regs + offset);
mipi_tx           161 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	writel((temp & ~mask) | (data & mask), mipi_tx->regs + offset);
mipi_tx           166 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw);
mipi_tx           170 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	dev_dbg(mipi_tx->dev, "prepare: %u Hz\n", mipi_tx->data_rate);
mipi_tx           172 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	if (mipi_tx->data_rate >= 500000000) {
mipi_tx           176 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	} else if (mipi_tx->data_rate >= 250000000) {
mipi_tx           180 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	} else if (mipi_tx->data_rate >= 125000000) {
mipi_tx           184 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	} else if (mipi_tx->data_rate > 62000000) {
mipi_tx           188 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	} else if (mipi_tx->data_rate >= 50000000) {
mipi_tx           196 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_BG_CON,
mipi_tx           205 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_TOP_CON,
mipi_tx           209 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_set_bits(mipi_tx, MIPITX_DSI_CON,
mipi_tx           212 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_PLL_PWR,
mipi_tx           217 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_PLL_CON0,
mipi_tx           220 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_PLL_CON0,
mipi_tx           233 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	pcw = div_u64(((u64)mipi_tx->data_rate * 2 * txdiv) << 24,
mipi_tx           235 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	writel(pcw, mipi_tx->regs + MIPITX_DSI_PLL_CON2);
mipi_tx           237 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_set_bits(mipi_tx, MIPITX_DSI_PLL_CON1,
mipi_tx           240 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_set_bits(mipi_tx, MIPITX_DSI_PLL_CON0, RG_DSI_MPPLL_PLL_EN);
mipi_tx           244 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_PLL_CON1,
mipi_tx           247 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_PLL_TOP,
mipi_tx           249 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 				mipi_tx->driver_data->mppll_preserve);
mipi_tx           256 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw);
mipi_tx           258 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	dev_dbg(mipi_tx->dev, "unprepare\n");
mipi_tx           260 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_PLL_CON0,
mipi_tx           263 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_PLL_TOP,
mipi_tx           266 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_PLL_PWR,
mipi_tx           271 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_TOP_CON,
mipi_tx           274 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_CON,
mipi_tx           277 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_BG_CON,
mipi_tx           280 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_PLL_CON0,
mipi_tx           293 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw);
mipi_tx           295 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	dev_dbg(mipi_tx->dev, "set rate: %lu Hz\n", rate);
mipi_tx           297 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mipi_tx->data_rate = rate;
mipi_tx           305 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw);
mipi_tx           307 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	return mipi_tx->data_rate;
mipi_tx           320 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy);
mipi_tx           325 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 		mtk_mipi_tx_set_bits(mipi_tx, reg, RG_DSI_LNTx_LDOOUT_EN);
mipi_tx           327 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_TOP_CON,
mipi_tx           335 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy);
mipi_tx           339 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	ret = clk_prepare_enable(mipi_tx->pll);
mipi_tx           351 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy);
mipi_tx           354 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mtk_mipi_tx_set_bits(mipi_tx, MIPITX_DSI_TOP_CON,
mipi_tx           359 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 		mtk_mipi_tx_clear_bits(mipi_tx, reg, RG_DSI_LNTx_LDOOUT_EN);
mipi_tx           364 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy);
mipi_tx           370 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	clk_disable_unprepare(mipi_tx->pll);
mipi_tx           384 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	struct mtk_mipi_tx *mipi_tx;
mipi_tx           398 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mipi_tx = devm_kzalloc(dev, sizeof(*mipi_tx), GFP_KERNEL);
mipi_tx           399 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	if (!mipi_tx)
mipi_tx           402 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mipi_tx->driver_data = of_device_get_match_data(dev);
mipi_tx           404 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mipi_tx->regs = devm_ioremap_resource(dev, mem);
mipi_tx           405 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	if (IS_ERR(mipi_tx->regs)) {
mipi_tx           406 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 		ret = PTR_ERR(mipi_tx->regs);
mipi_tx           426 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mipi_tx->pll_hw.init = &clk_init;
mipi_tx           427 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mipi_tx->pll = devm_clk_register(dev, &mipi_tx->pll_hw);
mipi_tx           428 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	if (IS_ERR(mipi_tx->pll)) {
mipi_tx           429 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 		ret = PTR_ERR(mipi_tx->pll);
mipi_tx           440 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	phy_set_drvdata(phy, mipi_tx);
mipi_tx           448 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 	mipi_tx->dev = dev;
mipi_tx           451 drivers/gpu/drm/mediatek/mtk_mipi_tx.c 				   mipi_tx->pll);