mio_rst_ctl      1151 arch/mips/pci/pcie-octeon.c 	union cvmx_mio_rst_ctlx mio_rst_ctl;
mio_rst_ctl      1231 arch/mips/pci/pcie-octeon.c 	mio_rst_ctl.u64 = cvmx_read_csr(CVMX_MIO_RST_CTLX(pcie_port));
mio_rst_ctl      1232 arch/mips/pci/pcie-octeon.c 	if (!mio_rst_ctl.s.host_mode) {
mio_rst_ctl      1910 arch/mips/pci/pcie-octeon.c 		union cvmx_mio_rst_ctlx mio_rst_ctl;
mio_rst_ctl      1911 arch/mips/pci/pcie-octeon.c 		mio_rst_ctl.u64 = cvmx_read_csr(CVMX_MIO_RST_CTLX(0));
mio_rst_ctl      1912 arch/mips/pci/pcie-octeon.c 		host_mode = mio_rst_ctl.s.host_mode;
mio_rst_ctl      1984 arch/mips/pci/pcie-octeon.c 		union cvmx_mio_rst_ctlx mio_rst_ctl;
mio_rst_ctl      1985 arch/mips/pci/pcie-octeon.c 		mio_rst_ctl.u64 = cvmx_read_csr(CVMX_MIO_RST_CTLX(1));
mio_rst_ctl      1986 arch/mips/pci/pcie-octeon.c 		host_mode = mio_rst_ctl.s.host_mode;