min_vblank_dram_clock_change_margin 1897 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 	v->min_vblank_dram_clock_change_margin = 999999.0;
min_vblank_dram_clock_change_margin 1899 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		if (v->min_vblank_dram_clock_change_margin > v->v_blank_dram_clock_change_latency_margin[k]) {
min_vblank_dram_clock_change_margin 1900 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->min_vblank_dram_clock_change_margin = v->v_blank_dram_clock_change_latency_margin[k];
min_vblank_dram_clock_change_margin 1904 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 		v->dram_clock_change_margin =dcn_bw_max2(v->min_active_dram_clock_change_margin, v->min_vblank_dram_clock_change_margin);
min_vblank_dram_clock_change_margin  538 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	float min_vblank_dram_clock_change_margin;