min_ttu_vblank 717 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c MIN_TTU_VBLANK, ttu_attr->min_ttu_vblank, min_ttu_vblank 956 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c MIN_TTU_VBLANK, &ttu_attr->min_ttu_vblank, min_ttu_vblank 1010 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c MIN_TTU_VBLANK, &s->min_ttu_vblank); min_ttu_vblank 647 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h uint32_t min_ttu_vblank; min_ttu_vblank 156 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c DTN_INFO_MICRO_SEC(s->min_ttu_vblank); min_ttu_vblank 230 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_vblank, min_ttu_vblank 156 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c (s->min_ttu_vblank * frac) / ref_clk_mhz / frac, (s->min_ttu_vblank * frac) / ref_clk_mhz % frac, min_ttu_vblank 176 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c (s->min_ttu_vblank * frac) / ref_clk_mhz / frac, (s->min_ttu_vblank * frac) / ref_clk_mhz % frac, min_ttu_vblank 311 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_vblank, min_ttu_vblank 287 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c MIN_TTU_VBLANK, ttu_attr->min_ttu_vblank, min_ttu_vblank 1154 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c MIN_TTU_VBLANK, &ttu_attr->min_ttu_vblank, min_ttu_vblank 1208 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c MIN_TTU_VBLANK, &s->min_ttu_vblank); min_ttu_vblank 805 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c double min_ttu_vblank; min_ttu_vblank 927 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); min_ttu_vblank 929 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; min_ttu_vblank 941 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c min_ttu_vblank); min_ttu_vblank 1556 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; min_ttu_vblank 1557 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); min_ttu_vblank 805 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c double min_ttu_vblank; min_ttu_vblank 927 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); min_ttu_vblank 929 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; min_ttu_vblank 941 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c min_ttu_vblank); min_ttu_vblank 1556 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; min_ttu_vblank 1557 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); min_ttu_vblank 852 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c double min_ttu_vblank; min_ttu_vblank 974 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); min_ttu_vblank 976 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; min_ttu_vblank 989 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c min_ttu_vblank); min_ttu_vblank 1656 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; min_ttu_vblank 1657 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); min_ttu_vblank 463 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h unsigned int min_ttu_vblank; min_ttu_vblank 122 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c dml_get_pipe_attr_func(min_ttu_vblank, mode_lib->vba.MinTTUVBlank); min_ttu_vblank 66 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h dml_get_pipe_attr_decl(min_ttu_vblank); min_ttu_vblank 343 drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c ttu_regs.min_ttu_vblank); min_ttu_vblank 1008 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c double min_ttu_vblank; min_ttu_vblank 1147 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c min_ttu_vblank = dlg_sys_param.t_urg_wm_us; min_ttu_vblank 1149 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c min_ttu_vblank = dml_max(dlg_sys_param.t_sr_wm_us, min_ttu_vblank); min_ttu_vblank 1151 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c min_ttu_vblank = dml_max(dlg_sys_param.t_mclk_wm_us, min_ttu_vblank); min_ttu_vblank 1152 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c min_ttu_vblank = min_ttu_vblank + t_calc_us; min_ttu_vblank 1154 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; min_ttu_vblank 1162 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c DTRACE("DLG: %s: min_ttu_vblank = %3.2f", __func__, min_ttu_vblank); min_ttu_vblank 1909 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; min_ttu_vblank 1910 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24));