min_ref_divider 253 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c uint32_t min_ref_divider, min_ref_divider 275 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c ref_divider = min_ref_divider; min_ref_divider 299 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c uint32_t min_ref_divider; min_ref_divider 338 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c min_ref_divider = pll_settings->reference_divider; min_ref_divider 341 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c min_ref_divider = ((calc_pll_cs->ref_freq_khz min_ref_divider 369 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c if (min_ref_divider > max_ref_divider) { min_ref_divider 383 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c min_ref_divider,