min_post_div      602 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		ppll->min_post_div = 2;
min_post_div      634 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		spll->min_post_div = 1;
min_post_div      666 drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c 		mpll->min_post_div = 1;
min_post_div      387 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 		spll->min_post_div = 1;
min_post_div      410 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 		mpll->min_post_div = 1;
min_post_div      210 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 	uint32_t min_post_div;
min_post_div      175 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 		if (post_div_min < pll->min_post_div)
min_post_div      176 drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c 			post_div_min = pll->min_post_div;
min_post_div      279 drivers/gpu/drm/radeon/radeon_clocks.c 		p1pll->min_post_div = 2;
min_post_div      283 drivers/gpu/drm/radeon/radeon_clocks.c 		p2pll->min_post_div = 2;
min_post_div      288 drivers/gpu/drm/radeon/radeon_clocks.c 		p1pll->min_post_div = 1;
min_post_div      292 drivers/gpu/drm/radeon/radeon_clocks.c 		p2pll->min_post_div = 1;
min_post_div      299 drivers/gpu/drm/radeon/radeon_clocks.c 	dcpll->min_post_div = 2;
min_post_div      322 drivers/gpu/drm/radeon/radeon_clocks.c 	spll->min_post_div = 1;
min_post_div      331 drivers/gpu/drm/radeon/radeon_clocks.c 	mpll->min_post_div = 1;
min_post_div     1019 drivers/gpu/drm/radeon/radeon_display.c 		if (post_div_min < pll->min_post_div)
min_post_div     1020 drivers/gpu/drm/radeon/radeon_display.c 			post_div_min = pll->min_post_div;
min_post_div     1118 drivers/gpu/drm/radeon/radeon_display.c 	uint32_t min_post_div = pll->min_post_div;
min_post_div     1163 drivers/gpu/drm/radeon/radeon_display.c 		min_post_div = max_post_div = pll->post_div;
min_post_div     1170 drivers/gpu/drm/radeon/radeon_display.c 	for (post_div = max_post_div; post_div >= min_post_div; --post_div) {
min_post_div      185 drivers/gpu/drm/radeon/radeon_mode.h 	uint32_t min_post_div;