min_meta_chunk_width  366 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	unsigned int min_meta_chunk_width;
min_meta_chunk_width  506 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 	min_meta_chunk_width = 1
min_meta_chunk_width  537 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width;
min_meta_chunk_width  539 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height;
min_meta_chunk_width  366 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	unsigned int min_meta_chunk_width;
min_meta_chunk_width  506 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 	min_meta_chunk_width = 1
min_meta_chunk_width  537 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width;
min_meta_chunk_width  539 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height;
min_meta_chunk_width 5858 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 	unsigned int min_meta_chunk_width;
min_meta_chunk_width 5894 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 			min_meta_chunk_width = MinMetaChunkSizeBytes * 256
min_meta_chunk_width 5899 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 				meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width[k];
min_meta_chunk_width 5901 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c 				meta_chunk_threshold = 2 * min_meta_chunk_width
min_meta_chunk_width  357 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	unsigned int min_meta_chunk_width;
min_meta_chunk_width  501 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 	min_meta_chunk_width = 1
min_meta_chunk_width  535 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width;
min_meta_chunk_width  537 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height;
min_meta_chunk_width  573 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	unsigned int min_meta_chunk_width;
min_meta_chunk_width  736 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 	min_meta_chunk_width = 1
min_meta_chunk_width  764 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width;
min_meta_chunk_width  766 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c 		meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_height;